{"id":"https://openalex.org/W2048012119","doi":"https://doi.org/10.1109/aspdac.2013.6509684","title":"A computational model for SAT-based verification of hardware-dependent low-level embedded system software","display_name":"A computational model for SAT-based verification of hardware-dependent low-level embedded system software","publication_year":2013,"publication_date":"2013-01-01","ids":{"openalex":"https://openalex.org/W2048012119","doi":"https://doi.org/10.1109/aspdac.2013.6509684","mag":"2048012119"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2013.6509684","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2013.6509684","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045536686","display_name":"Bernard Schmidt","orcid":"https://orcid.org/0000-0002-8906-630X"},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"B. Schmidt","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087718222","display_name":"Carlos Villarraga","orcid":"https://orcid.org/0000-0002-7699-8917"},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"C. Villarraga","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110023136","display_name":"J. Bormann","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Bormann","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047920654","display_name":"Dominik Stoffel","orcid":"https://orcid.org/0000-0002-8180-9738"},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"D. Stoffel","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020337959","display_name":"Markus Wedler","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Wedler","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066184879","display_name":"Wolfgang Kunz","orcid":"https://orcid.org/0000-0002-6612-2946"},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"W. Kunz","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., U. of Kaiserslautern, Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5045536686"],"corresponding_institution_ids":["https://openalex.org/I153267046"],"apc_list":null,"apc_paid":null,"fwci":1.1096,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.79100889,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"711","last_page":"716"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8220595717430115},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.7379357218742371},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.6069239974021912},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.5355876088142395},{"id":"https://openalex.org/keywords/satisfiability-modulo-theories","display_name":"Satisfiability modulo theories","score":0.5303326845169067},{"id":"https://openalex.org/keywords/software-verification","display_name":"Software verification","score":0.5283321142196655},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.47577014565467834},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47350460290908813},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.4722387492656708},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.4461032748222351},{"id":"https://openalex.org/keywords/boolean-satisfiability-problem","display_name":"Boolean satisfiability problem","score":0.43235594034194946},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42438170313835144},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.4186440110206604},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40378886461257935},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.36532288789749146},{"id":"https://openalex.org/keywords/software-system","display_name":"Software system","score":0.30109208822250366},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.24190974235534668},{"id":"https://openalex.org/keywords/software-construction","display_name":"Software construction","score":0.20246461033821106}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8220595717430115},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.7379357218742371},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.6069239974021912},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.5355876088142395},{"id":"https://openalex.org/C164155591","wikidata":"https://www.wikidata.org/wiki/Q2067766","display_name":"Satisfiability modulo theories","level":2,"score":0.5303326845169067},{"id":"https://openalex.org/C33054407","wikidata":"https://www.wikidata.org/wiki/Q6504747","display_name":"Software verification","level":5,"score":0.5283321142196655},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.47577014565467834},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47350460290908813},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.4722387492656708},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.4461032748222351},{"id":"https://openalex.org/C6943359","wikidata":"https://www.wikidata.org/wiki/Q875276","display_name":"Boolean satisfiability problem","level":2,"score":0.43235594034194946},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42438170313835144},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.4186440110206604},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40378886461257935},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.36532288789749146},{"id":"https://openalex.org/C149091818","wikidata":"https://www.wikidata.org/wiki/Q2429814","display_name":"Software system","level":3,"score":0.30109208822250366},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.24190974235534668},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.20246461033821106}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2013.6509684","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2013.6509684","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6299999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1577404745","https://openalex.org/W1992946078","https://openalex.org/W2024148935","https://openalex.org/W2040060046","https://openalex.org/W2065675749","https://openalex.org/W2076933173","https://openalex.org/W2081840025","https://openalex.org/W2082172430","https://openalex.org/W2091355737","https://openalex.org/W2100196127","https://openalex.org/W2114555045","https://openalex.org/W2115309705","https://openalex.org/W2117958841","https://openalex.org/W2126301692","https://openalex.org/W2158798798","https://openalex.org/W2171999426","https://openalex.org/W2220364193","https://openalex.org/W3151763762","https://openalex.org/W4241233758","https://openalex.org/W4254412902","https://openalex.org/W6631526622","https://openalex.org/W6669575494"],"related_works":["https://openalex.org/W2361881307","https://openalex.org/W2392047570","https://openalex.org/W2363848262","https://openalex.org/W1985271980","https://openalex.org/W2355428260","https://openalex.org/W2373681493","https://openalex.org/W2059150015","https://openalex.org/W4205924073","https://openalex.org/W1524612439","https://openalex.org/W1492252392"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,7,28,38,116,120],"method":[4],"to":[5],"generate":[6],"computational":[8,20],"model":[9,21,52],"for":[10,78],"formal":[11,103],"verification":[12,59,104],"of":[13,22,33,48,73,82,94,105],"hardware-dependent":[14],"software":[15,117],"in":[16,37],"embedded":[17],"systems.":[18],"The":[19,51,70],"the":[23,49,74,83,92,102],"combined":[24],"HW/SW":[25],"system":[26],"is":[27],"program":[29],"netlist":[30],"(PN)":[31],"consisting":[32],"instruction":[34],"cells":[35],"connected":[36],"directed":[39],"acyclic":[40],"graph":[41],"that":[42],"compactly":[43],"represents":[44],"all":[45],"execution":[46,88],"paths":[47],"software.":[50],"can":[53],"be":[54],"easily":[55],"integrated":[56],"into":[57],"SAT-based":[58],"environments":[60],"such":[61],"as":[62,115],"those":[63],"based":[64],"on":[65,119],"Bounded":[66],"Model":[67],"Checking":[68],"(BMC).":[69],"proposed":[71],"construction":[72],"model,":[75],"however,":[76],"allows":[77],"an":[79,106],"efficient":[80],"reasoning":[81],"SAT":[84],"solver":[85],"over":[86],"entire":[87],"paths.":[89],"We":[90],"demonstrate":[91],"efficiency":[93],"our":[95],"approach":[96],"by":[97],"presenting":[98],"experimental":[99],"results":[100],"from":[101],"industrial":[107],"LIN":[108],"(Local":[109],"Interconnect":[110],"Network)":[111],"bus":[112],"node,":[113],"implemented":[114],"driver":[118],"32-bit":[121],"RISC":[122],"machine.":[123]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":2}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}
