{"id":"https://openalex.org/W1999898778","doi":"https://doi.org/10.1109/aspdac.2012.6165026","title":"An Efficient Hamiltonian-cycle power-switch routing for MTCMOS designs","display_name":"An Efficient Hamiltonian-cycle power-switch routing for MTCMOS designs","publication_year":2012,"publication_date":"2012-01-01","ids":{"openalex":"https://openalex.org/W1999898778","doi":"https://doi.org/10.1109/aspdac.2012.6165026","mag":"1999898778"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2012.6165026","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2012.6165026","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100377962","display_name":"Yiming Wang","orcid":"https://orcid.org/0009-0002-7504-3569"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Ming Wang","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, 300"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, 300","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055000437","display_name":"Shihao Chen","orcid":"https://orcid.org/0000-0001-7646-8003"},"institutions":[{"id":"https://openalex.org/I4210086231","display_name":"Global Unichip (Taiwan)","ror":"https://ror.org/00005jn19","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210086231"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shi-Hao Chen","raw_affiliation_strings":["Hsin-Chu Science Park, Global Unichip Corporation, Hsinchu, Taiwan","Global Unichip Corp., Hsin-Chu Science Park, Hsinchu, Taiwan 300"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hsin-Chu Science Park, Global Unichip Corporation, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210086231"]},{"raw_affiliation_string":"Global Unichip Corp., Hsin-Chu Science Park, Hsinchu, Taiwan 300","institution_ids":["https://openalex.org/I4210086231"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045156360","display_name":"Mango C.-T. Chao","orcid":"https://orcid.org/0000-0002-7299-9015"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mango C.-T. Chao","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, 300"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, 300","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.08961244,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"59","last_page":"65"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.8819689154624939},{"id":"https://openalex.org/keywords/sleep-mode","display_name":"Sleep mode","score":0.5149498581886292},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5017049312591553},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4917176067829132},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4009655714035034},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3896016478538513},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3829087018966675},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.345909059047699},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32587558031082153},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2632182538509369},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2595478892326355},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.08663347363471985}],"concepts":[{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.8819689154624939},{"id":"https://openalex.org/C57149124","wikidata":"https://www.wikidata.org/wiki/Q587346","display_name":"Sleep mode","level":4,"score":0.5149498581886292},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5017049312591553},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4917176067829132},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4009655714035034},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3896016478538513},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3829087018966675},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.345909059047699},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32587558031082153},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2632182538509369},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2595478892326355},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.08663347363471985},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2012.6165026","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2012.6165026","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W2004934210","https://openalex.org/W2036704646","https://openalex.org/W2086839192","https://openalex.org/W2091339753","https://openalex.org/W2103227017","https://openalex.org/W2107387348","https://openalex.org/W2109111228","https://openalex.org/W2109797003","https://openalex.org/W2116656154","https://openalex.org/W2122006764","https://openalex.org/W2126416778","https://openalex.org/W2131862714","https://openalex.org/W2144045033","https://openalex.org/W2146518537","https://openalex.org/W2151477922","https://openalex.org/W2156805339","https://openalex.org/W2160457997","https://openalex.org/W2162051978","https://openalex.org/W2167426317","https://openalex.org/W2364237620","https://openalex.org/W3146975526","https://openalex.org/W4246982917","https://openalex.org/W4247881338","https://openalex.org/W6675468258"],"related_works":["https://openalex.org/W2124352950","https://openalex.org/W2018816676","https://openalex.org/W2017370932","https://openalex.org/W2137663768","https://openalex.org/W2331459838","https://openalex.org/W2155412769","https://openalex.org/W2041557219","https://openalex.org/W2078514087","https://openalex.org/W2133584003","https://openalex.org/W2029263260","https://openalex.org/W2183659756","https://openalex.org/W2115147238","https://openalex.org/W2065980112","https://openalex.org/W2027006313","https://openalex.org/W574669072","https://openalex.org/W2162666476","https://openalex.org/W1970278706","https://openalex.org/W2005728592","https://openalex.org/W2061209405","https://openalex.org/W2112183879"],"abstract_inverted_index":{"Multi-threshold":[0],"CMOS":[1],"(MTCMOS)":[2],"is":[3,132],"currently":[4],"the":[5,21,62,66,78,106,117,121,126],"most":[6],"popular":[7],"methodology":[8],"in":[9,37,142],"industry":[10],"for":[11,147],"implementing":[12],"a":[13,38,47,71,97,143],"power":[14,23,55,79,102,113,122],"gating":[15],"design,":[16],"which":[17,69,91],"can":[18,92],"effectively":[19,93],"reduce":[20,61],"leakage":[22],"by":[24,58],"turning":[25,53],"off":[26],"inactive":[27],"circuit":[28],"domains.":[29],"However,":[30],"large":[31],"peak":[32,63],"current":[33,64],"may":[34],"be":[35],"consumed":[36],"power-gated":[39],"domain":[40],"during":[41,65],"its":[42],"sleep-to-active":[43],"mode":[44,67],"transition.":[45],"As":[46],"result,":[48],"major":[49,144],"IC":[50],"foundries":[51],"recommend":[52],"on":[54],"switches":[56,103,114,123],"one":[57,59],"to":[60,74,134],"transition,":[68],"requires":[70],"Hamiltonian-cycle":[72,99],"routing":[73,89,100],"serially":[75],"connect":[76],"all":[77],"switches.":[80],"In":[81],"this":[82],"paper,":[83],"we":[84],"propose":[85],"an":[86],"efficient":[87],"power-switch":[88],"framework,":[90],"and":[94,138],"efficiently":[95],"find":[96],"feasible":[98],"among":[101],"without":[104],"violating":[105],"Manhattan":[107],"distance":[108],"constraint":[109],"between":[110],"any":[111],"two":[112],"while":[115],"handling":[116],"irregular":[118],"placement":[119],"of":[120],"resulting":[124],"from":[125],"hard":[127],"macros.":[128],"The":[129],"proposed":[130],"framework":[131],"compliant":[133],"commercial":[135],"APR":[136],"tools":[137],"has":[139],"been":[140],"used":[141],"design-service":[145],"company":[146],"taping":[148],"out":[149],"complex":[150],"MTCMOS":[151],"designs.":[152]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
