{"id":"https://openalex.org/W2048031428","doi":"https://doi.org/10.1109/aspdac.2012.6164991","title":"Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs","display_name":"Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs","publication_year":2012,"publication_date":"2012-01-01","ids":{"openalex":"https://openalex.org/W2048031428","doi":"https://doi.org/10.1109/aspdac.2012.6164991","mag":"2048031428"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2012.6164991","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2012.6164991","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103181085","display_name":"Rohit Sinha","orcid":"https://orcid.org/0000-0001-9107-0239"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Rohit Sinha","raw_affiliation_strings":["Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada","[Electrical & Computer Engineering, University of Waterloo, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"[Electrical & Computer Engineering, University of Waterloo, Canada]","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058454261","display_name":"Aayush Prakash","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Aayush Prakash","raw_affiliation_strings":["Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada","[Electrical & Computer Engineering, University of Waterloo, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"[Electrical & Computer Engineering, University of Waterloo, Canada]","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074065388","display_name":"Hiren Patel","orcid":"https://orcid.org/0000-0003-2750-4471"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hiren D. Patel","raw_affiliation_strings":["Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada","[Electrical & Computer Engineering, University of Waterloo, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"[Electrical & Computer Engineering, University of Waterloo, Canada]","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":47,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"455","last_page":"460"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9478815793991089},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8658369183540344},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6956751346588135},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6540085077285767},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5504631996154785},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5207907557487488},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.5198678970336914},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.5018353462219238},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.4312538802623749},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.42576074600219727},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4238860309123993},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.41243886947631836},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34122055768966675},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17604047060012817}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9478815793991089},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8658369183540344},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6956751346588135},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6540085077285767},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5504631996154785},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5207907557487488},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.5198678970336914},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.5018353462219238},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.4312538802623749},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.42576074600219727},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4238860309123993},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.41243886947631836},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34122055768966675},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17604047060012817},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2012.6164991","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2012.6164991","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W44583000","https://openalex.org/W1608473921","https://openalex.org/W2100512555","https://openalex.org/W2119658153","https://openalex.org/W2120965356","https://openalex.org/W2155502560","https://openalex.org/W3142366035","https://openalex.org/W3144573862","https://openalex.org/W3144680781"],"related_works":["https://openalex.org/W2983282793","https://openalex.org/W1973046741","https://openalex.org/W1963859303","https://openalex.org/W2364044215","https://openalex.org/W2389600408","https://openalex.org/W240129890","https://openalex.org/W3048701459","https://openalex.org/W2149078538","https://openalex.org/W2370314112","https://openalex.org/W1912958759"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"a":[3,27,123],"methodology":[4],"that":[5,58],"parallelizes":[6],"the":[7,44,73,79,95,102,106,110],"simulation":[8,24,82],"of":[9,67,88],"mixed-abstraction":[10],"level":[11],"SystemC":[12,28,55,81,96],"models":[13],"across":[14],"multicore":[15],"CPUs,":[16,100,111],"and":[17,39,75,101,112,122],"graphics":[18],"processing":[19],"units":[20],"(GPUs)":[21],"for":[22,36,47,114],"improved":[23],"performance.":[25],"Given":[26],"model,":[29],"we":[30,91],"partition":[31],"it":[32],"into":[33,50],"processes":[34,45,57,97],"suitable":[35],"GPU":[37,48,51,103],"execution":[38,49,87],"CPU":[40],"execution.":[41],"We":[42,77,117],"convert":[43],"identified":[46],"kernels":[52,104],"with":[53,119],"additional":[54],"wrapper":[56],"invoke":[59],"these":[60],"kernels.":[61],"The":[62],"wrappers":[63],"enable":[64],"seamless":[65],"communication":[66],"events":[68],"in":[69,93],"all":[70],"directions":[71],"between":[72],"GPUs":[74,113],"CPUs.":[76],"alter":[78],"OSCI":[80],"kernel":[83],"to":[84],"allow":[85],"parallel":[86],"processes.":[89],"Hence,":[90],"co-simulate":[92],"parallel,":[94],"on":[98,105],"multiple":[99],"GPUs;":[107],"exploit":[108],"both":[109],"faster":[115],"simulation.":[116],"experiment":[118],"synthetic":[120],"benchmarks":[121],"set-top":[124],"box":[125],"case":[126],"study.":[127]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":11},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":4}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}