{"id":"https://openalex.org/W3146255990","doi":"https://doi.org/10.1109/aspdac.2011.5722264","title":"Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs","display_name":"Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W3146255990","doi":"https://doi.org/10.1109/aspdac.2011.5722264","mag":"3146255990"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2011.5722264","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722264","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102460504","display_name":"Jae-Seok Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jae-Seok Yang","raw_affiliation_strings":["Department of ECE, University of Texas, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108395667","display_name":"Jiwoo Pak","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiwoo Pak","raw_affiliation_strings":["Department of ECE, University of Texas, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008495864","display_name":"Xin Zhao","orcid":"https://orcid.org/0000-0002-7922-0385"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]},{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xin Zhao","raw_affiliation_strings":["Department of ECE, University of Texas, Austin, TX, USA","School of ECE, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"School of ECE, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052950521","display_name":"Sung Kyu Lim","orcid":"https://orcid.org/0000-0002-2267-5282"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]},{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sung Kyu Lim","raw_affiliation_strings":["Department of ECE, University of Texas, Austin, TX, USA","School of ECE, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"School of ECE, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011883763","display_name":"David Z. Pan","orcid":"https://orcid.org/0000-0002-5705-2501"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Z. Pan","raw_affiliation_strings":["Department of ECE, University of Texas, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.475,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.9575414,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"621","last_page":"626"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.7902389764785767},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.7818818092346191},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.7340652942657471},{"id":"https://openalex.org/keywords/clock-network","display_name":"Clock network","score":0.6060572862625122},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5772435665130615},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.45209792256355286},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.4472441077232361},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.41410475969314575},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2708269953727722},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18471062183380127},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.16701889038085938},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08800041675567627}],"concepts":[{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.7902389764785767},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.7818818092346191},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.7340652942657471},{"id":"https://openalex.org/C2778182565","wikidata":"https://www.wikidata.org/wiki/Q1752879","display_name":"Clock network","level":5,"score":0.6060572862625122},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5772435665130615},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.45209792256355286},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.4472441077232361},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.41410475969314575},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2708269953727722},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18471062183380127},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.16701889038085938},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08800041675567627},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2011.5722264","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722264","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1693570377","https://openalex.org/W2002257666","https://openalex.org/W2015941345","https://openalex.org/W2026777333","https://openalex.org/W2069345435","https://openalex.org/W2118294059","https://openalex.org/W2126084661","https://openalex.org/W2149417654","https://openalex.org/W2150620980","https://openalex.org/W2163273848","https://openalex.org/W2546770439","https://openalex.org/W3145025383","https://openalex.org/W3148768868","https://openalex.org/W4235746813","https://openalex.org/W6654486189"],"related_works":["https://openalex.org/W2116259070","https://openalex.org/W2116514610","https://openalex.org/W4247180033","https://openalex.org/W2144282137","https://openalex.org/W2028052815","https://openalex.org/W2127379989","https://openalex.org/W2391115906","https://openalex.org/W2066822161","https://openalex.org/W2032549010","https://openalex.org/W2112814021"],"abstract_inverted_index":{"3D":[0,64,176],"integration":[1],"has":[2],"new":[3],"manufacturing":[4],"and":[5,15,49,149],"design":[6,96],"challenges":[7],"such":[8],"as":[9],"timing":[10],"corner":[11,27],"mismatch":[12,28],"between":[13,29],"tiers":[14,30],"device":[16],"variation":[17,43,70,107,145],"due":[18,75],"to":[19,47,76,103,123,147,171],"Through":[20],"Silicon":[21],"Via":[22],"(TSV)":[23],"induced":[24,58,127],"stress.":[25,130],"Timing":[26],"is":[31,36,60],"caused":[32],"because":[33],"each":[34],"tier":[35,140],"manufactured":[37],"in":[38,63],"independent":[39],"process.":[40],"Therefore,":[41],"inter-die":[42],"should":[44],"be":[45,156,169],"considered":[46],"analyze":[48],"optimize":[50],"for":[51],"paths":[52],"spreading":[53],"over":[54],"several":[55],"tiers.":[56],"TSV":[57,79],"stress":[59,77],"another":[61],"challenge":[62],"Clock":[65],"Tree":[66],"Synthesis":[67],"(CTS).":[68],"Mobility":[69],"of":[71,112,152],"a":[72],"clock":[73,94,105,113,138,143],"buffer":[74,139],"from":[78],"can":[80,155,168],"cause":[81],"unexpected":[82],"skew":[83,126,154],"which":[84],"degrades":[85],"overall":[86],"chip":[87],"performance.":[88],"In":[89,131],"this":[90],"paper,":[91],"we":[92,134,163],"propose":[93],"tree":[95],"methodology":[97],"with":[98,115,173],"the":[99,129,132,150],"following":[100],"objectives:":[101],"(a)":[102],"minimize":[104],"period":[106,144],"by":[108,128,158],"assigning":[109],"optimal":[110],"z-location":[111],"buffers":[114],"an":[116],"Integer":[117],"Linear":[118],"Program":[119],"(ILP)":[120],"formulation,":[121],"(b)":[122],"prevent":[124],"unwanted":[125],"results,":[133],"show":[135,164],"that":[136,165],"our":[137,159,174],"assignment":[141],"reduces":[142],"up":[146,170],"34.2%,":[148],"most":[151],"stress-induced":[153],"removed":[157],"stress-aware":[160],"CTS.":[161,177],"Overall,":[162],"performance":[166],"gain":[167],"5.7%":[172],"robust":[175]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
