{"id":"https://openalex.org/W3144780572","doi":"https://doi.org/10.1109/aspdac.2011.5722244","title":"Low power discrete voltage assignment under clock skew scheduling","display_name":"Low power discrete voltage assignment under clock skew scheduling","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W3144780572","doi":"https://doi.org/10.1109/aspdac.2011.5722244","mag":"3144780572"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2011.5722244","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722244","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100361041","display_name":"Li Li","orcid":"https://orcid.org/0000-0001-8485-2216"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Li Li","raw_affiliation_strings":["Electrical Engineering and Computer Science Department, Northwestern University, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering and Computer Science Department, Northwestern University, USA","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048528530","display_name":"Jian Sun","orcid":"https://orcid.org/0000-0002-7992-8092"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jian Sun","raw_affiliation_strings":["State Key Laboratory of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081521266","display_name":"Yinghai Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yinghai Lu","raw_affiliation_strings":["Electrical Engineering and Computer Science Department, Northwestern University, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering and Computer Science Department, Northwestern University, USA","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103038285","display_name":"Hai Zhou","orcid":"https://orcid.org/0000-0003-4824-7179"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hai Zhou","raw_affiliation_strings":["Electrical Engineering and Computer Science Department, Northwestern University, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering and Computer Science Department, Northwestern University, USA","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064213921","display_name":"Xuan Zeng","orcid":"https://orcid.org/0000-0002-8097-4053"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuan Zeng","raw_affiliation_strings":["State Key Laboratory of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100361041"],"corresponding_institution_ids":["https://openalex.org/I111979921"],"apc_list":null,"apc_paid":null,"fwci":0.2691,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.67251124,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"515","last_page":"520"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.5653371810913086},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5603417158126831},{"id":"https://openalex.org/keywords/job-shop-scheduling","display_name":"Job shop scheduling","score":0.5492722988128662},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.524330198764801},{"id":"https://openalex.org/keywords/assignment-problem","display_name":"Assignment problem","score":0.43314462900161743},{"id":"https://openalex.org/keywords/rounding","display_name":"Rounding","score":0.42900368571281433},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.4204508662223816},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.4188545346260071},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.4131665825843811},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4102010428905487},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3629681169986725},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2659560739994049},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.22948160767555237},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.17660099267959595},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.11937984824180603},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.10407149791717529}],"concepts":[{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.5653371810913086},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5603417158126831},{"id":"https://openalex.org/C55416958","wikidata":"https://www.wikidata.org/wiki/Q6206757","display_name":"Job shop scheduling","level":3,"score":0.5492722988128662},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.524330198764801},{"id":"https://openalex.org/C85044808","wikidata":"https://www.wikidata.org/wiki/Q620614","display_name":"Assignment problem","level":2,"score":0.43314462900161743},{"id":"https://openalex.org/C136625980","wikidata":"https://www.wikidata.org/wiki/Q663208","display_name":"Rounding","level":2,"score":0.42900368571281433},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.4204508662223816},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.4188545346260071},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.4131665825843811},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4102010428905487},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3629681169986725},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2659560739994049},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.22948160767555237},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.17660099267959595},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.11937984824180603},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.10407149791717529},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2011.5722244","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722244","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1999034258","https://openalex.org/W2041242446","https://openalex.org/W2055798429","https://openalex.org/W2080375462","https://openalex.org/W2098143668","https://openalex.org/W2099335235","https://openalex.org/W2102726266","https://openalex.org/W2132178096","https://openalex.org/W2134435031","https://openalex.org/W2139411793","https://openalex.org/W2149976210","https://openalex.org/W2150973769","https://openalex.org/W2155075225","https://openalex.org/W2158104184","https://openalex.org/W2166295488","https://openalex.org/W4238954159","https://openalex.org/W4251061827","https://openalex.org/W4253886560","https://openalex.org/W6664309405","https://openalex.org/W6670705208","https://openalex.org/W6671597310","https://openalex.org/W6675054460","https://openalex.org/W6675580108","https://openalex.org/W6676518761","https://openalex.org/W6682239439"],"related_works":["https://openalex.org/W4220780102","https://openalex.org/W2410881844","https://openalex.org/W3196334750","https://openalex.org/W1502401885","https://openalex.org/W2004257129","https://openalex.org/W2116281088","https://openalex.org/W2357551824","https://openalex.org/W2016668641","https://openalex.org/W2019368960","https://openalex.org/W2349094459"],"abstract_inverted_index":{"Multiple":[0],"Supply":[1],"Voltage":[2],"(MSV)":[3],"assignment":[4,59,70,134],"has":[5,30,41],"emerged":[6],"as":[7,75,179],"an":[8],"appealing":[9],"technique":[10],"in":[11,20,38,45,88,99,147,159,164],"low":[12],"power":[13,22,160],"IC":[14],"design,":[15],"due":[16],"to":[17,108,171],"its":[18],"flexibility":[19],"balancing":[21],"and":[23,136,188],"performance.":[24],"However,":[25],"clock":[26,65],"skew":[27],"scheduling,":[28],"which":[29,83],"great":[31],"impact":[32],"on":[33,141,162],"criticality":[34],"of":[35,48,93,129,144],"combinational":[36,167],"paths":[37],"sequential":[39,62,68],"circuit,":[40],"not":[42],"been":[43],"explored":[44],"the":[46,110,121,127,130,142,172,180,183,189],"merit":[47],"MSV":[49,69,168],"assignment.":[50,169],"In":[51],"this":[52,145],"paper,":[53],"we":[54,125],"propose":[55],"a":[56,76,103],"discrete":[57,116,132],"voltage":[58,133],"algorithm":[60,155],"for":[61,153],"circuit":[63],"under":[64],"scheduling.":[66],"The":[67],"problem":[71,135,146],"is":[72,106,192],"first":[73],"formulated":[74],"convex":[77],"cost":[78],"dual":[79],"network":[80,177],"flow":[81,178],"problem,":[82],"can":[84,96],"be":[85,97],"optimally":[86],"solved":[87],"polynomial":[89],"time":[90],"assuming":[91],"delay":[92],"each":[94],"gate":[95],"chosen":[98],"continuous":[100,112,173],"domain.":[101],"Then":[102],"mincut-based":[104],"heuristic":[105],"designed":[107],"convert":[109],"unfeasible":[111],"solution":[113,117,174,187],"into":[114],"feasible":[115],"while":[118],"largely":[119],"preserving":[120],"global":[122],"optimality.":[123],"Besides,":[124],"revisit":[126],"hardness":[128],"general":[131],"point":[137],"out":[138],"some":[139],"misunderstandings":[140],"approximability":[143],"previous":[148],"related":[149],"work.":[150],"Benchmark":[151],"test":[152],"our":[154,186],"shows":[156],"9.2%":[157],"reduction":[158],"consumption":[161],"average,":[163],"compared":[165],"with":[166],"Referring":[170],"obtained":[175],"from":[176],"lower":[181,190],"bound,":[182],"gap":[184],"between":[185],"bound":[191],"only":[193],"1.77%.":[194]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}