{"id":"https://openalex.org/W3146616442","doi":"https://doi.org/10.1109/aspdac.2011.5722201","title":"Automatic formal verification of reconfigurable DSPs","display_name":"Automatic formal verification of reconfigurable DSPs","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W3146616442","doi":"https://doi.org/10.1109/aspdac.2011.5722201","mag":"3146616442"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2011.5722201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722201","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030659202","display_name":"Miroslav N. Velev","orcid":"https://orcid.org/0000-0001-7775-5186"},"institutions":[{"id":"https://openalex.org/I4210135261","display_name":"Aries Design Automation (United States)","ror":"https://ror.org/045fe0126","country_code":"US","type":"company","lineage":["https://openalex.org/I4210135261"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Miroslav N. Velev","raw_affiliation_strings":["Aries Design Automation, Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"Aries Design Automation, Chicago, IL, USA","institution_ids":["https://openalex.org/I4210135261"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101168953","display_name":"Ping Gao","orcid":null},"institutions":[{"id":"https://openalex.org/I4210135261","display_name":"Aries Design Automation (United States)","ror":"https://ror.org/045fe0126","country_code":"US","type":"company","lineage":["https://openalex.org/I4210135261"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ping Gao","raw_affiliation_strings":["Aries Design Automation, Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"Aries Design Automation, Chicago, IL, USA","institution_ids":["https://openalex.org/I4210135261"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5030659202"],"corresponding_institution_ids":["https://openalex.org/I4210135261"],"apc_list":null,"apc_paid":null,"fwci":1.883,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.86472819,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"293","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8260034322738647},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7055897116661072},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.6890103816986084},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.6605225205421448},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5886605381965637},{"id":"https://openalex.org/keywords/formal-methods","display_name":"Formal methods","score":0.5241018533706665},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5157116055488586},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48470258712768555},{"id":"https://openalex.org/keywords/workstation","display_name":"Workstation","score":0.4817412197589874},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.47524523735046387},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.46694719791412354},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4317702054977417},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3255500793457031},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3015878200531006},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1478787660598755},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13529789447784424}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8260034322738647},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7055897116661072},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.6890103816986084},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.6605225205421448},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5886605381965637},{"id":"https://openalex.org/C75606506","wikidata":"https://www.wikidata.org/wiki/Q1049183","display_name":"Formal methods","level":2,"score":0.5241018533706665},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5157116055488586},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48470258712768555},{"id":"https://openalex.org/C67953723","wikidata":"https://www.wikidata.org/wiki/Q192525","display_name":"Workstation","level":2,"score":0.4817412197589874},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.47524523735046387},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.46694719791412354},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4317702054977417},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3255500793457031},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3015878200531006},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1478787660598755},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13529789447784424},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2011.5722201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722201","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W22071009","https://openalex.org/W1485619141","https://openalex.org/W1506611120","https://openalex.org/W1515401645","https://openalex.org/W1525387472","https://openalex.org/W1567496318","https://openalex.org/W1575830255","https://openalex.org/W1583532098","https://openalex.org/W1595023561","https://openalex.org/W1599662310","https://openalex.org/W1686347472","https://openalex.org/W1979072566","https://openalex.org/W2006120207","https://openalex.org/W2010880586","https://openalex.org/W2021915358","https://openalex.org/W2087702998","https://openalex.org/W2103976856","https://openalex.org/W2104115705","https://openalex.org/W2105038441","https://openalex.org/W2107770151","https://openalex.org/W2113367538","https://openalex.org/W2118154221","https://openalex.org/W2124515106","https://openalex.org/W2167749016","https://openalex.org/W2178304595","https://openalex.org/W4231695381","https://openalex.org/W4232818563","https://openalex.org/W4238811272","https://openalex.org/W4244027186","https://openalex.org/W4246569419","https://openalex.org/W6600897036","https://openalex.org/W6629011927","https://openalex.org/W6630699798","https://openalex.org/W6630708207","https://openalex.org/W6651697937","https://openalex.org/W6672010448","https://openalex.org/W6678520457","https://openalex.org/W6922477936"],"related_works":["https://openalex.org/W2361915154","https://openalex.org/W134967625","https://openalex.org/W2084471986","https://openalex.org/W2363708040","https://openalex.org/W2164381711","https://openalex.org/W2208809382","https://openalex.org/W2144552376","https://openalex.org/W2541382934","https://openalex.org/W2336952395","https://openalex.org/W1991347376"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,60,77,89],"method":[3,47],"for":[4,22,32],"automatic":[5,46],"formal":[6,39,74],"verification":[7,40,75],"of":[8,48,55,63,70,76,85],"Digital":[9],"Signal":[10],"Processors":[11],"(DSPs)":[12],"that":[13,58],"have":[14],"VLIW":[15],"architecture":[16],"and":[17,67],"reconfigurable":[18,79],"functional":[19],"units":[20],"optimized":[21],"accelerating":[23],"Software":[24],"Defined":[25],"Radio":[26],"(SDR)":[27],"applications":[28],"to":[29],"be":[30],"used":[31],"future":[33],"space":[34,66],"communications":[35],"by":[36,51],"NASA.":[37],"The":[38,73],"was":[41],"done":[42],"with":[43],"the":[44,53,64],"highly":[45],"Correspondence":[49],"Checking":[50],"exploiting":[52],"property":[54],"Positive":[56],"Equality":[57],"allows":[59],"dramatic":[61],"simplification":[62],"solution":[65],"many":[68],"orders":[69],"magnitude":[71],"speedup.":[72],"complex":[78],"DSP":[80],"took":[81],"approximately":[82],"10":[83],"minutes":[84],"CPU":[86],"time":[87],"on":[88],"single":[90],"workstation,":[91],"when":[92],"using":[93],"our":[94],"industrial-strength":[95],"tool":[96],"flow.":[97]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2014,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}