{"id":"https://openalex.org/W3152276953","doi":"https://doi.org/10.1109/aspdac.2011.5722182","title":"Pulser gating: A clock gating of pulsed-latch circuits","display_name":"Pulser gating: A clock gating of pulsed-latch circuits","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W3152276953","doi":"https://doi.org/10.1109/aspdac.2011.5722182","mag":"3152276953"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2011.5722182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722182","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100704248","display_name":"Sang Min Kim","orcid":"https://orcid.org/0000-0002-5334-4945"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Sangmin Kim","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031562748","display_name":"Inhak Han","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Inhak Han","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108744170","display_name":"Seungwhun Paik","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seungwhun Paik","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020011072","display_name":"Youngsoo Shin","orcid":"https://orcid.org/0000-0002-7474-9212"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngsoo Shin","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100704248"],"corresponding_institution_ids":["https://openalex.org/I157485424"],"apc_list":null,"apc_paid":null,"fwci":3.1796,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.92527892,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"190","last_page":"195"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/gating","display_name":"Gating","score":0.9048451781272888},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.782528281211853},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.7129919528961182},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.5589317679405212},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5549827814102173},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4199678301811218},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.40659067034721375},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38232025504112244},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.26813387870788574},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25324124097824097},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21145594120025635},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.19463136792182922},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.15764334797859192},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1574336588382721},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14817065000534058},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.11258912086486816}],"concepts":[{"id":"https://openalex.org/C194544171","wikidata":"https://www.wikidata.org/wiki/Q21105679","display_name":"Gating","level":2,"score":0.9048451781272888},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.782528281211853},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.7129919528961182},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.5589317679405212},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5549827814102173},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4199678301811218},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.40659067034721375},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38232025504112244},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.26813387870788574},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25324124097824097},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21145594120025635},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.19463136792182922},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.15764334797859192},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1574336588382721},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14817065000534058},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.11258912086486816},{"id":"https://openalex.org/C42407357","wikidata":"https://www.wikidata.org/wiki/Q521","display_name":"Physiology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2011.5722182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722182","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7900000214576721,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1511688816","https://openalex.org/W2036887642","https://openalex.org/W2098560306","https://openalex.org/W2125117969","https://openalex.org/W2142398851","https://openalex.org/W2143727503","https://openalex.org/W2152938140","https://openalex.org/W2169033838","https://openalex.org/W3197625055","https://openalex.org/W6630623413","https://openalex.org/W6636248855"],"related_works":["https://openalex.org/W2416253771","https://openalex.org/W2998118341","https://openalex.org/W2259094912","https://openalex.org/W2546524276","https://openalex.org/W4226239708","https://openalex.org/W2152979262","https://openalex.org/W3127845477","https://openalex.org/W2005728592","https://openalex.org/W4239594101","https://openalex.org/W229101532"],"abstract_inverted_index":{"A":[0],"pulsed-latch":[1,23],"is":[2,46,84,103,144],"an":[3],"ideal":[4],"sequencing":[5],"element":[6],"for":[7,48,117],"low-power":[8],"ASIC":[9],"designs":[10],"due":[11],"to":[12,74,92,113,136],"its":[13,110],"smaller":[14],"capacitance":[15],"and":[16,109,140,146,153],"simple":[17],"timing":[18],"model.":[19],"Clock":[20],"gating":[21,29,44,64,70,82,107,132,138],"of":[22,42,58,66,78,95,97,120,131,142,150],"circuits":[24],"can":[25],"be":[26,114],"realized":[27],"by":[28,105],"a":[30,53,100],"pulse":[31],"generator":[32],"(or":[33],"pulser),":[34],"which":[35,102],"we":[36,60],"call":[37],"pulser":[38,43],"gating.":[39],"The":[40,122],"problem":[41],"synthesis":[45],"formulated":[47],"the":[49,63,69,76],"first":[50,61],"time.":[51],"Given":[52],"gate-level":[54],"netlist":[55],"with":[56],"location":[57],"latches,":[59,98],"extract":[62],"function":[65],"each":[67],"latch;":[68],"functions":[71],"are":[72],"merged":[73,106],"reduce":[75],"amount":[77],"extra":[79],"logic":[80],"while":[81],"probability":[83],"not":[85],"sacrificed":[86],"too":[87],"much.":[88],"We":[89],"also":[90],"have":[91,112],"take":[93],"account":[94],"proximity":[96,141],"because":[99],"pulser,":[101],"gated":[104],"function,":[108],"latches":[111],"physically":[115],"close":[116],"safe":[118],"delivery":[119],"pulse.":[121],"heuristic":[123],"algorithm":[124],"that":[125],"considers":[126],"all":[127],"three":[128],"factors":[129],"(similarity":[130],"functions,":[133,139],"literal":[134],"count":[135],"implement":[137],"latches)":[143],"proposed":[145],"assessed":[147],"in":[148],"terms":[149],"power":[151],"saving":[152],"area":[154],"using":[155],"45-nm":[156],"technology.":[157]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}