{"id":"https://openalex.org/W3147832535","doi":"https://doi.org/10.1109/aspdac.2011.5722168","title":"Analog circuit verification by statistical model checking","display_name":"Analog circuit verification by statistical model checking","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W3147832535","doi":"https://doi.org/10.1109/aspdac.2011.5722168","mag":"3147832535"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2011.5722168","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722168","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090734756","display_name":"Ying-Chih Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ying-Chih Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027580280","display_name":"Anvesh Komuravelli","orcid":"https://orcid.org/0000-0002-0927-2075"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anvesh Komuravelli","raw_affiliation_strings":["Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054022139","display_name":"Paolo Zuliani","orcid":"https://orcid.org/0000-0001-6033-5919"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paolo Zuliani","raw_affiliation_strings":["Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105356861","display_name":"Edmund M. Clarke","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edmund M. Clarke","raw_affiliation_strings":["Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5090734756"],"corresponding_institution_ids":["https://openalex.org/I74973139"],"apc_list":null,"apc_paid":null,"fwci":2.1969,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.88265717,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"2937","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7435846328735352},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.6170428395271301},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5314705967903137},{"id":"https://openalex.org/keywords/statistical-model","display_name":"Statistical model","score":0.47891128063201904},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.4685308337211609},{"id":"https://openalex.org/keywords/state-space","display_name":"State space","score":0.46199536323547363},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.45744746923446655},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4304143190383911},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3764507472515106},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3748418688774109},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3614591956138611},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3537675738334656},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2609395682811737},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17543500661849976},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13560602068901062},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09169557690620422},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.07944309711456299}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7435846328735352},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.6170428395271301},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5314705967903137},{"id":"https://openalex.org/C114289077","wikidata":"https://www.wikidata.org/wiki/Q3284399","display_name":"Statistical model","level":2,"score":0.47891128063201904},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.4685308337211609},{"id":"https://openalex.org/C72434380","wikidata":"https://www.wikidata.org/wiki/Q230930","display_name":"State space","level":2,"score":0.46199536323547363},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.45744746923446655},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4304143190383911},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3764507472515106},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3748418688774109},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3614591956138611},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3537675738334656},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2609395682811737},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17543500661849976},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13560602068901062},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09169557690620422},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.07944309711456299},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/aspdac.2011.5722168","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722168","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1681065","is_oa":false,"landing_page_url":"https://hdl.handle.net/11573/1681065","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1534714322","https://openalex.org/W1537946603","https://openalex.org/W1544634046","https://openalex.org/W1560643704","https://openalex.org/W1783413852","https://openalex.org/W1806449990","https://openalex.org/W2023808162","https://openalex.org/W2067971887","https://openalex.org/W2134451579","https://openalex.org/W2141881497","https://openalex.org/W2153160343","https://openalex.org/W2155660165","https://openalex.org/W2161081924","https://openalex.org/W3143982981","https://openalex.org/W6631988104","https://openalex.org/W6632532180","https://openalex.org/W6633764857","https://openalex.org/W6638293775","https://openalex.org/W6677971256"],"related_works":["https://openalex.org/W1572578464","https://openalex.org/W2804745155","https://openalex.org/W2736259393","https://openalex.org/W2529542719","https://openalex.org/W2182066955","https://openalex.org/W2162351207","https://openalex.org/W2087152645","https://openalex.org/W2952737788","https://openalex.org/W2493800215","https://openalex.org/W1546995467"],"abstract_inverted_index":{"We":[0],"show":[1],"how":[2],"statistical":[3,65,112],"Model":[4,48],"Checking":[5,49],"can":[6,50],"be":[7,51],"used":[8],"for":[9,56],"verifying":[10,35],"properties":[11,72],"of":[12,34,42,73],"analog":[13,26,74],"circuits.":[14],"As":[15],"integrated":[16],"circuit":[17],"technologies":[18],"scale":[19],"down,":[20],"manufacturing":[21],"variations":[22],"in":[23,76],"devices":[24],"make":[25],"designs":[27],"behave":[28],"like":[29],"stochastic":[30,36,57],"systems.":[31,58],"The":[32],"problem":[33],"systems":[37],"is":[38,114],"often":[39],"difficult":[40],"because":[41],"their":[43],"large":[44],"state":[45],"space.":[46],"Statistical":[47],"an":[52],"efficient":[53],"verification":[54],"technique":[55],"In":[59,84],"this":[60],"paper,":[61],"we":[62],"use":[63],"sequential":[64],"techniques":[66],"and":[67,80,95],"model":[68],"checking":[69],"to":[70,97,101],"verify":[71],"circuits":[75],"both":[77],"the":[78,81,110],"temporal":[79],"frequency":[82],"domain.":[83],"particular,":[85],"randomly":[86],"sampled":[87],"system":[88],"traces":[89],"are":[90],"sequentially":[91],"generated":[92],"by":[93],"SPICE":[94],"passed":[96],"a":[98,106],"trace":[99],"checker":[100],"determine":[102],"whether":[103],"they":[104],"satisfy":[105],"given":[107],"specification,":[108],"until":[109],"desired":[111],"strength":[113],"achieved.":[115]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2021-04-13T00:00:00"}