{"id":"https://openalex.org/W3143079914","doi":"https://doi.org/10.1109/aspdac.2011.5722162","title":"An on-chip characterizing system for within-die delay variation measurement of individual standard cells in 65-nm CMOS","display_name":"An on-chip characterizing system for within-die delay variation measurement of individual standard cells in 65-nm CMOS","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W3143079914","doi":"https://doi.org/10.1109/aspdac.2011.5722162","mag":"3143079914"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2011.5722162","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722162","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051085669","display_name":"Xin Zhang","orcid":"https://orcid.org/0000-0002-0579-2268"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]},{"id":"https://openalex.org/I91947458","display_name":"Mejiro University","ror":"https://ror.org/047wxqn68","country_code":"JP","type":"education","lineage":["https://openalex.org/I91947458"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Xin Zhang","raw_affiliation_strings":["University of Tokyo, Meguro, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Tokyo, Meguro, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974","https://openalex.org/I91947458"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087315408","display_name":"Koichi Ishida","orcid":"https://orcid.org/0000-0002-4152-1203"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]},{"id":"https://openalex.org/I91947458","display_name":"Mejiro University","ror":"https://ror.org/047wxqn68","country_code":"JP","type":"education","lineage":["https://openalex.org/I91947458"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Koichi Ishida","raw_affiliation_strings":["University of Tokyo, Meguro, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Tokyo, Meguro, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974","https://openalex.org/I91947458"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003282110","display_name":"Makoto Takamiya","orcid":"https://orcid.org/0000-0003-0289-7790"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]},{"id":"https://openalex.org/I91947458","display_name":"Mejiro University","ror":"https://ror.org/047wxqn68","country_code":"JP","type":"education","lineage":["https://openalex.org/I91947458"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Makoto Takamiya","raw_affiliation_strings":["University of Tokyo, Meguro, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Tokyo, Meguro, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974","https://openalex.org/I91947458"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112189116","display_name":"Takayasu Sakurai","orcid":null},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]},{"id":"https://openalex.org/I91947458","display_name":"Mejiro University","ror":"https://ror.org/047wxqn68","country_code":"JP","type":"education","lineage":["https://openalex.org/I91947458"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takayasu Sakurai","raw_affiliation_strings":["University of Tokyo, Meguro, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Tokyo, Meguro, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974","https://openalex.org/I91947458"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.58,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.94027447,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"109","last_page":"110"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/oscilloscope","display_name":"Oscilloscope","score":0.7798593044281006},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7692316174507141},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.6839404106140137},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5901396870613098},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5810291767120361},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.55256587266922},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46284979581832886},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4541851282119751},{"id":"https://openalex.org/keywords/system-of-measurement","display_name":"System of measurement","score":0.44990453124046326},{"id":"https://openalex.org/keywords/measure","display_name":"Measure (data warehouse)","score":0.4447927474975586},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.43686604499816895},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40183427929878235},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2933592200279236},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.23754245042800903},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21346408128738403}],"concepts":[{"id":"https://openalex.org/C184026988","wikidata":"https://www.wikidata.org/wiki/Q174320","display_name":"Oscilloscope","level":3,"score":0.7798593044281006},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7692316174507141},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.6839404106140137},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5901396870613098},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5810291767120361},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.55256587266922},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46284979581832886},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4541851282119751},{"id":"https://openalex.org/C37649242","wikidata":"https://www.wikidata.org/wiki/Q932268","display_name":"System of measurement","level":2,"score":0.44990453124046326},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.4447927474975586},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.43686604499816895},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40183427929878235},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2933592200279236},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.23754245042800903},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21346408128738403},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C1276947","wikidata":"https://www.wikidata.org/wiki/Q333","display_name":"Astronomy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2011.5722162","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2011.5722162","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1487984748","https://openalex.org/W1572287951","https://openalex.org/W1975790448","https://openalex.org/W2099320289","https://openalex.org/W2108271947","https://openalex.org/W6634220963","https://openalex.org/W6675799725"],"related_works":["https://openalex.org/W1972598373","https://openalex.org/W2364019159","https://openalex.org/W1489049788","https://openalex.org/W2243648136","https://openalex.org/W2092244125","https://openalex.org/W2366843459","https://openalex.org/W2101967049","https://openalex.org/W5110330","https://openalex.org/W3105663793","https://openalex.org/W2355230123"],"abstract_inverted_index":{"New":[0],"characterizing":[1,15],"system":[2,16],"for":[3,57,85],"within-die":[4],"delay":[5,24,72],"variations":[6,25,73],"of":[7,35,49,78],"individual":[8,36],"standard":[9,50,80],"cells":[10,51,81],"is":[11,17,82],"presented.":[12],"The":[13],"proposed":[14,63],"able":[18],"to":[19,61],"measure":[20],"rising":[21,69],"and":[22,32,70,74],"falling":[23,71],"separately":[26],"by":[27],"directly":[28],"measuring":[29],"the":[30,62,68,75,79,86],"input":[31],"output":[33],"waveforms":[34],"gate":[37],"using":[38],"an":[39],"on-chip":[40],"sampling":[41],"oscilloscope":[42],"in":[43],"65nm":[44],"CMOS":[45],"process.":[46],"7":[47],"types":[48],"are":[52],"measured":[53],"with":[54],"60":[55],"DUT's":[56],"each":[58],"type.":[59],"Thanks":[60],"system,":[64],"a":[65],"relationship":[66],"between":[67],"active":[76],"area":[77],"experimentally":[83],"shown":[84],"first":[87],"time.":[88]},"counts_by_year":[{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
