{"id":"https://openalex.org/W4253886560","doi":"https://doi.org/10.1109/aspdac.2010.5419919","title":"Simultaneous slack budgeting and retiming for synchronous circuits optimization","display_name":"Simultaneous slack budgeting and retiming for synchronous circuits optimization","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W4253886560","doi":"https://doi.org/10.1109/aspdac.2010.5419919"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2010.5419919","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419919","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100677830","display_name":"Shenghua Liu","orcid":"https://orcid.org/0000-0001-9427-4923"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shenghua Liu","raw_affiliation_strings":["Department of Computer Science & Technology, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102025379","display_name":"Yuchun Ma","orcid":"https://orcid.org/0000-0003-3160-6681"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuchun Ma","raw_affiliation_strings":["Department of Computer Science & Technology, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111914906","display_name":"Xianlong Hong","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianlong Hong","raw_affiliation_strings":["Department of Computer Science & Technology, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100445061","display_name":"Yu Wang","orcid":"https://orcid.org/0000-0001-6108-5157"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yu Wang","raw_affiliation_strings":["Department of Electronic Engineering, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"2644","issue":null,"first_page":"49","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.9878398180007935},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.648436963558197},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.6008298397064209},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3214094638824463},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.31776419281959534},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1785273551940918},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13992062211036682},{"id":"https://openalex.org/keywords/operations-management","display_name":"Operations management","score":0.07582232356071472}],"concepts":[{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.9878398180007935},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.648436963558197},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.6008298397064209},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3214094638824463},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.31776419281959534},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1785273551940918},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13992062211036682},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.07582232356071472}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2010.5419919","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419919","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1527113684","https://openalex.org/W1689645186","https://openalex.org/W1827532909","https://openalex.org/W1974073956","https://openalex.org/W1996200948","https://openalex.org/W2012833920","https://openalex.org/W2026871322","https://openalex.org/W2087656024","https://openalex.org/W2097163769","https://openalex.org/W2118513740","https://openalex.org/W2119635306","https://openalex.org/W2122440811","https://openalex.org/W2128957415","https://openalex.org/W2129490922","https://openalex.org/W2142129142","https://openalex.org/W2142320620","https://openalex.org/W2147869417","https://openalex.org/W2151887125","https://openalex.org/W2152439301","https://openalex.org/W2155218600","https://openalex.org/W2162212766","https://openalex.org/W2166378964","https://openalex.org/W2172100886","https://openalex.org/W4248668797","https://openalex.org/W4250939969","https://openalex.org/W4252518822","https://openalex.org/W4254031535","https://openalex.org/W6631302508","https://openalex.org/W6677950995"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2134549436","https://openalex.org/W233224440","https://openalex.org/W2160236198","https://openalex.org/W1951668625","https://openalex.org/W2903287280","https://openalex.org/W3140976369","https://openalex.org/W2132158474","https://openalex.org/W2161928569"],"abstract_inverted_index":{"With":[0],"the":[1,10,18,28,53,58,89,93,99,116,124,136,152,155,159],"challenges":[2],"of":[3,37,102,126,130,151],"growing":[4],"functionality":[5],"and":[6,71,134,144,158],"scaling":[7],"chip":[8],"size,":[9],"possible":[11,38],"performance":[12,39,118,157],"improvements":[13,40],"should":[14],"be":[15],"considered":[16,42],"in":[17,43,119],"earlier":[19],"IC":[20],"design":[21],"stages,":[22],"which":[23,147],"gives":[24],"more":[25],"freedom":[26],"to":[27],"later":[29],"optimization.":[30],"Potential":[31],"slack":[32,60,69,83,95,101,111,138,160],"as":[33,47,49],"an":[34],"effective":[35],"metric":[36],"is":[41,52,75,85,139],"this":[44],"work":[45,55],"which,":[46],"far":[48],"we":[50],"known,":[51],"first":[54],"that":[56],"maximizes":[57],"potential":[59,79,100,110,137],"by":[61,87,142],"retiming":[62,73],"for":[63,77],"synchronous":[64],"sequential":[65],"circuit.":[66],"A":[67],"simultaneous":[68],"budgeting":[70],"incremental":[72],"algorithm":[74,108],"proposed":[76],"maximizing":[78],"slack.":[80],"The":[81],"overall":[82],"budget":[84],"optimized":[86],"relocating":[88],"FFs":[90],"iteratively":[91],"with":[92,98],"MIS-based":[94],"estimation.":[96],"Compared":[97],"a":[103,127,149],"well-known":[104],"min-period":[105],"retiming,":[106],"our":[107],"improves":[109],"averagely":[112,141],"19.6%":[113],"without":[114],"degrading":[115],"circuit":[117],"reasonable":[120],"runtime.":[121],"Furthermore,":[122],"at":[123],"expense":[125],"small":[128],"amount":[129],"timing":[131,156],"performance,":[132],"0.52%":[133],"2.08%,":[135],"increased":[140],"19.89%":[143],"28.16%":[145],"separately,":[146],"give":[148],"hint":[150],"tradeoff":[153],"between":[154],"budget.":[161]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}