{"id":"https://openalex.org/W4229611031","doi":"https://doi.org/10.1109/aspdac.2010.5419904","title":"A flexible hybrid simulation platform targeting multiple configurable processors SoC","display_name":"A flexible hybrid simulation platform targeting multiple configurable processors SoC","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W4229611031","doi":"https://doi.org/10.1109/aspdac.2010.5419904"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2010.5419904","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419904","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052847653","display_name":"Hao Shen","orcid":"https://orcid.org/0000-0001-6481-4941"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Hao Shen","raw_affiliation_strings":["System Level Synthesis Group, TIMA Laboratory,CNRS Grenoble INP, Universite Joseph Fourier de Grenoble, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Level Synthesis Group, TIMA Laboratory,CNRS Grenoble INP, Universite Joseph Fourier de Grenoble, Grenoble, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I4210087012","https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085830369","display_name":"Fr\u00e9d\u00e9ric P\u00e9trot","orcid":"https://orcid.org/0000-0003-0624-7373"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Frederic Petrot","raw_affiliation_strings":["System Level Synthesis Group, TIMA Laboratory,CNRS Grenoble INP, Universite Joseph Fourier de Grenoble, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Level Synthesis Group, TIMA Laboratory,CNRS Grenoble INP, Universite Joseph Fourier de Grenoble, Grenoble, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I4210087012","https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7591,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.76068773,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"155","last_page":"160"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.9171926975250244},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.8440805673599243},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7767770886421204},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7048512697219849},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5743824243545532},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5235157608985901},{"id":"https://openalex.org/keywords/host","display_name":"Host (biology)","score":0.4657934904098511},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4529196619987488},{"id":"https://openalex.org/keywords/abstraction-layer","display_name":"Abstraction layer","score":0.41794297099113464},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4103131890296936},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2627226710319519},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2401430308818817},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.20798784494400024}],"concepts":[{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.9171926975250244},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.8440805673599243},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7767770886421204},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7048512697219849},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5743824243545532},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5235157608985901},{"id":"https://openalex.org/C126831891","wikidata":"https://www.wikidata.org/wiki/Q221673","display_name":"Host (biology)","level":2,"score":0.4657934904098511},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4529196619987488},{"id":"https://openalex.org/C147358964","wikidata":"https://www.wikidata.org/wiki/Q1200992","display_name":"Abstraction layer","level":3,"score":0.41794297099113464},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4103131890296936},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2627226710319519},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2401430308818817},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.20798784494400024},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/aspdac.2010.5419904","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419904","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-00560510v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00560510","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Asia South-Pacific Design Automation Conference (ASP-DAC'10), Jan 2010, Taipei, Japan. pp.155-160, ⟨10.1109/ASPDAC.2010.5419904⟩","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7099999785423279}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1522250664","https://openalex.org/W2045128322","https://openalex.org/W2074276042","https://openalex.org/W2097521061","https://openalex.org/W2117539868","https://openalex.org/W2120713299","https://openalex.org/W2122593349","https://openalex.org/W2122759024","https://openalex.org/W2130513448","https://openalex.org/W2151355704","https://openalex.org/W2160179803","https://openalex.org/W2725179571","https://openalex.org/W4234456726","https://openalex.org/W4234906286","https://openalex.org/W4235917001","https://openalex.org/W4238435901","https://openalex.org/W4243988216","https://openalex.org/W4246347036","https://openalex.org/W4256101352","https://openalex.org/W6631155369","https://openalex.org/W6641838138","https://openalex.org/W6658545325","https://openalex.org/W6677480979","https://openalex.org/W6820139873"],"related_works":["https://openalex.org/W1581055755","https://openalex.org/W2102117846","https://openalex.org/W2132074508","https://openalex.org/W4256613086","https://openalex.org/W2149449165","https://openalex.org/W2547475129","https://openalex.org/W2362654847","https://openalex.org/W2119788505","https://openalex.org/W2099675346","https://openalex.org/W4238487776"],"abstract_inverted_index":{"Multiple":[0],"Configurable":[1],"Processors":[2],"System-on-Chip":[3],"(MCPSoC)":[4],"platforms":[5],"have":[6],"both":[7],"performance":[8],"and":[9,28,66,77,104],"power":[10],"advantages":[11,116],"for":[12],"embedded":[13],"applications.":[14],"Unfortunately,":[15],"at":[16],"early":[17],"design":[18],"stages,":[19],"because":[20],"of":[21,108,117],"the":[22,37,68,83,96,115,130],"processor":[23],"configuration,":[24],"I/O":[25,78],"device":[26,79],"changes":[27],"MCPSoC":[29],"architecture":[30],"modifications,":[31],"designers":[32],"waste":[33],"much":[34],"time":[35],"on":[36,86],"Operating":[38],"System":[39],"(OS)":[40],"porting":[41,111],"work":[42],"with":[43,82,123],"general":[44,64],"Instruction":[45],"Set":[46],"Simulator":[47],"(ISS)":[48],"based":[49],"SoC":[50],"simulation":[51,60,92,121],"platforms.":[52],"In":[53],"this":[54],"paper,":[55],"we":[56],"propose":[57],"a":[58,124],"hybrid":[59,91,120],"platform":[61,93,122],"which":[62],"uses":[63],"ISS":[65],"implements":[67],"Hardware":[69],"Abstraction":[70],"Layer":[71],"(HAL)":[72],"Application":[73],"Programming":[74],"Interfaces":[75],"(APIs)":[76],"driver":[80],"APIs":[81],"SystemC":[84],"modules":[85],"host":[87],"machines":[88],"directly.":[89],"This":[90],"can":[94],"shorten":[95],"application":[97],"validation":[98],"process":[99],"by":[100],"avoiding":[101],"assembly":[102],"code":[103],"hard-coded":[105],"address":[106],"modifications":[107],"traditional":[109],"OS":[110],"work.":[112],"We":[113],"show":[114],"our":[118],"new":[119],"video":[125],"decoding":[126],"case":[127],"study":[128],"in":[129],"end.":[131]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}