{"id":"https://openalex.org/W3146346127","doi":"https://doi.org/10.1109/aspdac.2010.5419881","title":"Optimal simultaneous pin assignment and escape routing for dense PCBs","display_name":"Optimal simultaneous pin assignment and escape routing for dense PCBs","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W3146346127","doi":"https://doi.org/10.1109/aspdac.2010.5419881","mag":"3146346127"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2010.5419881","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419881","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085552574","display_name":"Hui Kong","orcid":"https://orcid.org/0000-0003-4158-2900"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Hui Kong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065619529","display_name":"Tan Yan","orcid":"https://orcid.org/0000-0001-8943-8356"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tan Yan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053378706","display_name":"Martin D. F. Wong","orcid":"https://orcid.org/0000-0001-8274-9688"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Martin D.F Wong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5085552574"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":2.6469,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.9080048,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"275","last_page":"280"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9909999966621399,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.811244010925293},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.6960406303405762},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6318274736404419},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.5124662518501282},{"id":"https://openalex.org/keywords/network-routing","display_name":"Network routing","score":0.5112340450286865},{"id":"https://openalex.org/keywords/assignment-problem","display_name":"Assignment problem","score":0.5040708780288696},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.5029057860374451},{"id":"https://openalex.org/keywords/placement","display_name":"Placement","score":0.5013198852539062},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4538572430610657},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.45040377974510193},{"id":"https://openalex.org/keywords/weapon-target-assignment-problem","display_name":"Weapon target assignment problem","score":0.4397915303707123},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.42629921436309814},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4161171317100525},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.371107280254364},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.35079291462898254},{"id":"https://openalex.org/keywords/generalized-assignment-problem","display_name":"Generalized assignment problem","score":0.32381200790405273},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2854349911212921},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.22694754600524902},{"id":"https://openalex.org/keywords/optimization-problem","display_name":"Optimization problem","score":0.19782298803329468},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16004452109336853},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.15641218423843384}],"concepts":[{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.811244010925293},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.6960406303405762},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6318274736404419},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.5124662518501282},{"id":"https://openalex.org/C2983435990","wikidata":"https://www.wikidata.org/wiki/Q22725","display_name":"Network routing","level":3,"score":0.5112340450286865},{"id":"https://openalex.org/C85044808","wikidata":"https://www.wikidata.org/wiki/Q620614","display_name":"Assignment problem","level":2,"score":0.5040708780288696},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.5029057860374451},{"id":"https://openalex.org/C117690923","wikidata":"https://www.wikidata.org/wiki/Q1484784","display_name":"Placement","level":4,"score":0.5013198852539062},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4538572430610657},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.45040377974510193},{"id":"https://openalex.org/C30202268","wikidata":"https://www.wikidata.org/wiki/Q7978065","display_name":"Weapon target assignment problem","level":4,"score":0.4397915303707123},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.42629921436309814},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4161171317100525},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.371107280254364},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.35079291462898254},{"id":"https://openalex.org/C194146004","wikidata":"https://www.wikidata.org/wiki/Q5532462","display_name":"Generalized assignment problem","level":3,"score":0.32381200790405273},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2854349911212921},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.22694754600524902},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.19782298803329468},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16004452109336853},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.15641218423843384},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2010.5419881","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419881","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5400000214576721,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2021397396","https://openalex.org/W2048214598","https://openalex.org/W2094923634","https://openalex.org/W2124983287","https://openalex.org/W2138421468","https://openalex.org/W3152470347","https://openalex.org/W4236063479","https://openalex.org/W4237638069","https://openalex.org/W4242492623","https://openalex.org/W4245484162","https://openalex.org/W6657784182","https://openalex.org/W6678419370","https://openalex.org/W6682548440"],"related_works":["https://openalex.org/W2937059810","https://openalex.org/W1586515950","https://openalex.org/W2358965113","https://openalex.org/W2379349345","https://openalex.org/W2382974548","https://openalex.org/W2760584304","https://openalex.org/W2113934189","https://openalex.org/W2311097448","https://openalex.org/W2028174200","https://openalex.org/W3086805279"],"abstract_inverted_index":{"In":[0,34],"PCB":[1],"designs,":[2],"pin":[3,12,45,58,75,117],"positions":[4],"greatly":[5],"affect":[6],"routability":[7,23],"of":[8,56,136],"the":[9,54,74,81,94,125],"design.":[10],"State-of-the-art":[11],"assignment":[13,46,59,76,118],"algorithms":[14],"are":[15,128],"guided":[16],"by":[17],"simple":[18],"(heuristic)":[19],"metrics":[20],"to":[21,29,42],"estimate":[22],"and":[24,60,77,86,98,119],"thus":[25],"have":[26],"no":[27],"guarantee":[28],"obtain":[30,43],"a":[31,39,44,84,106],"routable":[32],"solution.":[33],"this":[35],"paper,":[36],"we":[37],"present":[38,87],"novel":[40],"approach":[41,104],"solution":[47],"that":[48,53],"guarantees":[49],"routability.":[50],"We":[51,70,101],"show":[52],"problem":[55],"simultaneous":[57],"escape":[61,78,120],"routing":[62,79,121],"can":[63],"be":[64],"solved":[65],"optimally":[66],"in":[67,83,131],"polynomial":[68],"time.":[69,138],"then":[71],"focus":[72],"on":[73,105],"for":[80,123],"terminals":[82],"bus,":[85],"algorithmic":[88],"enhancements":[89],"as":[90,92],"well":[91],"discuss":[93],"tradeoffs":[95],"between":[96],"single-layer":[97],"multi-layer":[99],"implementations.":[100],"tested":[102],"our":[103],"state-of-the-art":[107],"industrial":[108],"board":[109],"with":[110],"80":[111,126],"buses":[112,127],"(over":[113],"7000":[114],"nets).":[115],"The":[116],"solutions":[122],"all":[124],"successfully":[129],"obtainted":[130],"less":[132],"than":[133],"5":[134],"minutes":[135],"CPU":[137]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":4}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}