{"id":"https://openalex.org/W4238613860","doi":"https://doi.org/10.1109/aspdac.2010.5419839","title":"Workload capacity considering NBTI degradation in multi-core systems","display_name":"Workload capacity considering NBTI degradation in multi-core systems","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W4238613860","doi":"https://doi.org/10.1109/aspdac.2010.5419839"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2010.5419839","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419839","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026027275","display_name":"Jin Sun","orcid":"https://orcid.org/0000-0003-4855-2499"},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jin Sun","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Arizona Tucson, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Arizona Tucson, USA","institution_ids":["https://openalex.org/I138006243"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015269679","display_name":"Roman Lysecky","orcid":"https://orcid.org/0000-0002-5000-0848"},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Roman Lysecky","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Arizona Tucson, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Arizona Tucson, USA","institution_ids":["https://openalex.org/I138006243"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089681467","display_name":"Karthik Shankar","orcid":"https://orcid.org/0000-0001-7347-3333"},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Karthik Shankar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Arizona Tucson, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Arizona Tucson, USA","institution_ids":["https://openalex.org/I138006243"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Avinash Kodi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210106879","display_name":"Ohio University","ror":"https://ror.org/01jr3y717","country_code":"US","type":"education","lineage":["https://openalex.org/I4210106879"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Avinash Kodi","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Ohio University, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Ohio University, USA","institution_ids":["https://openalex.org/I4210106879"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034189643","display_name":"Ahmed Louri","orcid":"https://orcid.org/0000-0003-4262-6688"},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ahmed Louri","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Arizona Tucson, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Arizona Tucson, USA","institution_ids":["https://openalex.org/I138006243"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049620282","display_name":"Janet M. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Janet M. Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Arizona Tucson, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Arizona Tucson, USA","institution_ids":["https://openalex.org/I138006243"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5026027275"],"corresponding_institution_ids":["https://openalex.org/I138006243"],"apc_list":null,"apc_paid":null,"fwci":0.7581,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.76076644,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"7","issue":null,"first_page":"450","last_page":"455"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mean-time-between-failures","display_name":"Mean time between failures","score":0.9002953767776489},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.8317629098892212},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.6600341796875},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.6212369203567505},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5984356999397278},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5932744741439819},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5896393060684204},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5798765420913696},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.515673041343689},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.4369451105594635},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.416300892829895},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.41456806659698486},{"id":"https://openalex.org/keywords/failure-rate","display_name":"Failure rate","score":0.40046724677085876},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.266523540019989},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2531948685646057},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12265387177467346},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.11181765794754028},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.10299769043922424},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.09388279914855957},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08968541026115417},{"id":"https://openalex.org/keywords/operations-management","display_name":"Operations management","score":0.08178654313087463}],"concepts":[{"id":"https://openalex.org/C44154001","wikidata":"https://www.wikidata.org/wiki/Q754940","display_name":"Mean time between failures","level":3,"score":0.9002953767776489},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.8317629098892212},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.6600341796875},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.6212369203567505},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5984356999397278},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5932744741439819},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5896393060684204},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5798765420913696},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.515673041343689},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4369451105594635},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.416300892829895},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.41456806659698486},{"id":"https://openalex.org/C163164238","wikidata":"https://www.wikidata.org/wiki/Q2737027","display_name":"Failure rate","level":2,"score":0.40046724677085876},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.266523540019989},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2531948685646057},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12265387177467346},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.11181765794754028},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.10299769043922424},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.09388279914855957},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08968541026115417},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.08178654313087463},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2010.5419839","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2010.5419839","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W39945766","https://openalex.org/W1534741631","https://openalex.org/W2007861889","https://openalex.org/W2031808753","https://openalex.org/W2066698193","https://openalex.org/W2091158003","https://openalex.org/W2099746875","https://openalex.org/W2102729267","https://openalex.org/W2104674350","https://openalex.org/W2126564504","https://openalex.org/W2127703742","https://openalex.org/W2128690714","https://openalex.org/W2162011055","https://openalex.org/W2166417226","https://openalex.org/W2308694106","https://openalex.org/W4234640396","https://openalex.org/W4250899749","https://openalex.org/W6666855326","https://openalex.org/W6675497357","https://openalex.org/W6678664461","https://openalex.org/W6678675210","https://openalex.org/W6683977754","https://openalex.org/W6698671111"],"related_works":["https://openalex.org/W2053233382","https://openalex.org/W2034080945","https://openalex.org/W2337334590","https://openalex.org/W2006898677","https://openalex.org/W167642385","https://openalex.org/W912168359","https://openalex.org/W2060246408","https://openalex.org/W2162366020","https://openalex.org/W2345792680","https://openalex.org/W2766464071"],"abstract_inverted_index":{"As":[0],"device":[1,37],"feature":[2],"sizes":[3],"continue":[4],"to":[5,17,42,71,76,87,115],"shrink,":[6],"long-term":[7],"reliability":[8],"such":[9],"as":[10],"Negative":[11],"Bias":[12],"Temperature":[13],"Instability":[14],"(NBTI)":[15],"leads":[16],"low":[18],"yields":[19],"and":[20,80,96],"short":[21,119],"mean-time-to-failure":[22],"(MTTF)":[23],"in":[24,90,145],"multi-core":[25,128],"systems.":[26],"This":[27],"paper":[28],"proposes":[29],"a":[30,109,118],"new":[31],"workload":[32,45,95],"balancing":[33],"scheme":[34],"based":[35],"on":[36,102],"level":[38],"fractional":[39],"NBTI":[40,64],"model":[41],"balance":[43],"the":[44,57,63,113,124],"among":[46],"active":[47],"cores":[48,73,114],"while":[49,137],"relaxing":[50],"stressed":[51],"ones.":[52],"The":[53],"proposed":[54,125],"method":[55],"employs":[56],"Capacity":[58],"Rate":[59],"(CR)":[60],"provided":[61],"by":[62,107,135,140],"model,":[65],"applies":[66],"Dynamic":[67,83],"Zoning":[68],"(DZ)":[69],"algorithm":[70],"group":[72],"into":[74],"zones":[75],"process":[77],"task":[78],"flows,":[79],"then":[81],"uses":[82],"Task":[84],"Scheduling":[85],"(DTS)":[86],"allocate":[88],"tasks":[89],"each":[91],"zone":[92],"with":[93,142],"balanced":[94],"minimum":[97],"communication":[98],"cost.":[99],"Experimental":[100],"results":[101],"64-core":[103],"system":[104,129],"show":[105],"that":[106],"allowing":[108],"small":[110],"part":[111],"of":[112,132],"relax":[116],"over":[117],"time":[120],"period":[121],"(10":[122],"seconds),":[123],"methodology":[126],"improves":[127],"yield":[130],"(percentage":[131],"core":[133],"failures)":[134],"20%,":[136],"extending":[138],"MTTF":[139],"30%":[141],"insignificant":[143],"degradation":[144],"performance":[146],"(less":[147],"than":[148],"3%).":[149]},"counts_by_year":[{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}