{"id":"https://openalex.org/W3143978765","doi":"https://doi.org/10.1109/aspdac.2009.4796567","title":"Novel task migration framework on configurable heterogeneous MPSoC platforms","display_name":"Novel task migration framework on configurable heterogeneous MPSoC platforms","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W3143978765","doi":"https://doi.org/10.1109/aspdac.2009.4796567","mag":"3143978765"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2009.4796567","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796567","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052847653","display_name":"Hao Shen","orcid":"https://orcid.org/0000-0001-6481-4941"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Hao Shen","raw_affiliation_strings":["TIMA Laboratory, System Level Synthesis Group, CNRS/Grenoble INP/UJF, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, System Level Synthesis Group, CNRS/Grenoble INP/UJF, Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I106785703","https://openalex.org/I177483745","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113546155","display_name":"Frederic Petrot","orcid":null},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Frederic Petrot","raw_affiliation_strings":["TIMA Laboratory, System Level Synthesis Group, CNRS/Grenoble INP/UJF, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, System Level Synthesis Group, CNRS/Grenoble INP/UJF, Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I106785703","https://openalex.org/I177483745","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.6085,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.85342544,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"733","last_page":"738"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.9409498572349548},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8457366228103638},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6050854921340942},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5704147815704346},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5144631862640381},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.4888390898704529},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4877846837043762},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4844965636730194},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46671125292778015},{"id":"https://openalex.org/keywords/application-specific-instruction-set-processor","display_name":"Application-specific instruction-set processor","score":0.4242195785045624},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.34776702523231506},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.3227936327457428},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3101719617843628},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.27751219272613525},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.24092859029769897}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9409498572349548},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8457366228103638},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6050854921340942},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5704147815704346},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5144631862640381},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.4888390898704529},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4877846837043762},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4844965636730194},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46671125292778015},{"id":"https://openalex.org/C201736964","wikidata":"https://www.wikidata.org/wiki/Q621583","display_name":"Application-specific instruction-set processor","level":3,"score":0.4242195785045624},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.34776702523231506},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.3227936327457428},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3101719617843628},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27751219272613525},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.24092859029769897},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/aspdac.2009.4796567","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796567","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-00419246v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00419246","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"14th Asia and South Pacific Design Automation Conference (ASP-DAC'09), Jan 2009, Yokohama,, Japan. pp.733-738, ⟨10.1109/ASPDAC.2009.4796567⟩","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1580327099","https://openalex.org/W1976474972","https://openalex.org/W2097521061","https://openalex.org/W2101631461","https://openalex.org/W2158791769","https://openalex.org/W2159025940","https://openalex.org/W2725179571","https://openalex.org/W4242466841","https://openalex.org/W4244854666","https://openalex.org/W4246347036","https://openalex.org/W4247264372","https://openalex.org/W4252209735"],"related_works":["https://openalex.org/W2047885859","https://openalex.org/W2036206036","https://openalex.org/W2189543321","https://openalex.org/W1976012348","https://openalex.org/W2614713859","https://openalex.org/W2002682434","https://openalex.org/W4387782849","https://openalex.org/W2137671689","https://openalex.org/W2551798393","https://openalex.org/W2113449380"],"abstract_inverted_index":{"Heterogeneous":[0],"MPSoC":[1,51],"architectures":[2],"can":[3,74,86,103,144],"provide":[4],"higher":[5,146],"performance":[6],"and":[7,13,124,150],"flexibility":[8],"with":[9],"less":[10],"power":[11],"consumption":[12],"lower":[14],"cost":[15],"than":[16],"homogeneous":[17],"ones.":[18],"However,":[19],"as":[20],"processor":[21,91,98,147],"instruction":[22,64],"sets":[23],"of":[24,108,126],"general":[25],"heterogeneous":[26,35,50,56],"MPSoCs":[27],"are":[28,58],"not":[29,38],"identical,":[30],"tasks":[31,127],"migration":[32,125,142],"between":[33,128],"two":[34],"processors":[36,57,79],"is":[37,118],"possible.":[39],"To":[40],"enable":[41],"this":[42,109],"function,":[43],"we":[44,137],"propose":[45],"to":[46,80,92,120],"build":[47],"one":[48,90],"specific":[49],"platform":[52],"in":[53],"which":[54,102],"all":[55,100],"based":[59],"on":[60,114],"the":[61,67,82,96,105,115,122,129,133],"same":[62],"core":[63],"set":[65],"for":[66,77],"operating":[68],"system":[69,83],"realization.":[70],"Different":[71],"extended":[72],"instructions":[73,101],"be":[75,87],"added":[76],"different":[78],"improve":[81],"performance.":[84],"Tasks":[85],"migrated":[88],"from":[89],"another":[93],"only":[94],"if":[95],"target":[97],"has":[99],"meet":[104],"execution":[106],"requirement":[107],"task.":[110],"This":[111],"paper":[112],"concentrates":[113],"infrastructure":[116],"that":[117,139],"necessary":[119],"support":[121],"scheduling":[123],"processors.":[130],"By":[131],"using":[132],"motion-JPEG":[134],"case":[135],"study,":[136],"confirm":[138],"our":[140],"task":[141],"framework":[143],"achieve":[145],"usage":[148],"rate":[149],"more":[151],"flexibility.":[152]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}