{"id":"https://openalex.org/W3147784729","doi":"https://doi.org/10.1109/aspdac.2009.4796528","title":"Scheduled voltage scaling for increasing lifetime in the presence of NBTI","display_name":"Scheduled voltage scaling for increasing lifetime in the presence of NBTI","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W3147784729","doi":"https://doi.org/10.1109/aspdac.2009.4796528","mag":"3147784729"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2009.4796528","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796528","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009788784","display_name":"Lide Zhang","orcid":"https://orcid.org/0000-0002-6572-6051"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Lide Zhang","raw_affiliation_strings":["EECS Department, Northwestern University, Evanston, IL, USA"],"affiliations":[{"raw_affiliation_string":"EECS Department, Northwestern University, Evanston, IL, USA","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068224304","display_name":"Robert P. Dick","orcid":"https://orcid.org/0000-0001-5428-9530"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robert P. Dick","raw_affiliation_strings":["EECS Department, Northwestern University, Evanston, IL, USA"],"affiliations":[{"raw_affiliation_string":"EECS Department, Northwestern University, Evanston, IL, USA","institution_ids":["https://openalex.org/I111979921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5009788784"],"corresponding_institution_ids":["https://openalex.org/I111979921"],"apc_list":null,"apc_paid":null,"fwci":10.0588,"has_fulltext":false,"cited_by_count":82,"citation_normalized_percentile":{"value":0.98559493,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"492","last_page":"497"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.9322114586830139},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.8236782550811768},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.6780555248260498},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.6422670483589172},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.6401535272598267},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5748982429504395},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5596311092376709},{"id":"https://openalex.org/keywords/overdrive-voltage","display_name":"Overdrive voltage","score":0.5220006704330444},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.509154736995697},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.44633233547210693},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4460337460041046},{"id":"https://openalex.org/keywords/guard","display_name":"Guard (computer science)","score":0.42571133375167847},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.40953487157821655},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3352760374546051},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33208656311035156},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.25510910153388977},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15049263834953308},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.11145558953285217},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.0894438624382019}],"concepts":[{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.9322114586830139},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.8236782550811768},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.6780555248260498},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.6422670483589172},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.6401535272598267},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5748982429504395},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5596311092376709},{"id":"https://openalex.org/C195905723","wikidata":"https://www.wikidata.org/wiki/Q7113634","display_name":"Overdrive voltage","level":5,"score":0.5220006704330444},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.509154736995697},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.44633233547210693},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4460337460041046},{"id":"https://openalex.org/C141141315","wikidata":"https://www.wikidata.org/wiki/Q2379942","display_name":"Guard (computer science)","level":2,"score":0.42571133375167847},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.40953487157821655},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3352760374546051},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33208656311035156},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.25510910153388977},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15049263834953308},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.11145558953285217},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0894438624382019},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2009.4796528","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796528","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1527137186","https://openalex.org/W2107996516","https://openalex.org/W2112188813","https://openalex.org/W2122757690","https://openalex.org/W2125890858","https://openalex.org/W2131235069","https://openalex.org/W2141425839","https://openalex.org/W2142908374","https://openalex.org/W4253620068"],"related_works":["https://openalex.org/W1999919743","https://openalex.org/W2081382200","https://openalex.org/W2100282217","https://openalex.org/W2157278395","https://openalex.org/W2164047446","https://openalex.org/W2096191509","https://openalex.org/W2944990515","https://openalex.org/W2536658181","https://openalex.org/W2113225301","https://openalex.org/W2978403380"],"abstract_inverted_index":{"Negative":[0],"Bias":[1],"Temperature":[2],"Instability":[3],"(NBTI)":[4],"is":[5],"a":[6,31,72],"leading":[7],"reliability":[8],"concern":[9],"for":[10,44,68],"integrated":[11],"circuits":[12],"(ICs).":[13],"It":[14],"gradually":[15,34],"increases":[16,35],"the":[17,36,40,52,62],"threshold":[18],"voltages":[19],"of":[20,39],"PMOS":[21],"transistors,":[22],"thereby":[23],"increasing":[24],"delay.":[25],"We":[26],"propose":[27],"scheduled":[28],"voltage":[29,38,49],"scaling,":[30],"technique":[32],"that":[33],"operating":[37],"IC":[41,56],"to":[42,54,61],"compensate":[43],"NBTI-related":[45],"performance":[46],"degradation.":[47],"Scheduled":[48],"scaling":[50],"has":[51],"potential":[53],"increase":[55],"lifetime":[57],"by":[58],"46%":[59],"relative":[60],"conventional":[63],"approach":[64],"using":[65,71],"guard":[66],"banding":[67],"ICs":[69],"fabricated":[70],"45":[73],"nm":[74],"process.":[75]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":13},{"year":2012,"cited_by_count":11}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}