{"id":"https://openalex.org/W3145643808","doi":"https://doi.org/10.1109/aspdac.2009.4796503","title":"HitME: Low power Hit MEmory buffer for embedded systems","display_name":"HitME: Low power Hit MEmory buffer for embedded systems","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W3145643808","doi":"https://doi.org/10.1109/aspdac.2009.4796503","mag":"3145643808"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2009.4796503","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796503","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060566740","display_name":"Andhi Janapsatya","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Andhi Janapsatya","raw_affiliation_strings":["School of Computer Science & Engineering, University of New South Wales, Sydney, NSW, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science & Engineering, University of New South Wales, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030042327","display_name":"Sri Parameswaran","orcid":"https://orcid.org/0000-0003-0435-9080"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Sri Parameswaran","raw_affiliation_strings":["School of Computer Science & Engineering, University of New South Wales, Sydney, NSW, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science & Engineering, University of New South Wales, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034898997","display_name":"Aleksandar Ignjatovi\u0107","orcid":"https://orcid.org/0000-0002-7718-8270"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Aleksandar Ignjatovic","raw_affiliation_strings":["School of Computer Science & Engineering, University of New South Wales, Sydney, NSW, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science & Engineering, University of New South Wales, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I31746571"],"apc_list":null,"apc_paid":null,"fwci":0.5487,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.66221524,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"335","last_page":"340"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8402592539787292},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.8259241580963135},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.8214849233627319},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7743543386459351},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.7042560577392578},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.6890153288841248},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6000320315361023},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.5951706767082214},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5753492116928101},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.5740870237350464},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.4785473942756653},{"id":"https://openalex.org/keywords/cache-oblivious-algorithm","display_name":"Cache-oblivious algorithm","score":0.45569485425949097},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4424932301044464},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39967069029808044},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.38115930557250977}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8402592539787292},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.8259241580963135},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.8214849233627319},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7743543386459351},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.7042560577392578},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.6890153288841248},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6000320315361023},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.5951706767082214},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5753492116928101},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.5740870237350464},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.4785473942756653},{"id":"https://openalex.org/C59687516","wikidata":"https://www.wikidata.org/wiki/Q5015938","display_name":"Cache-oblivious algorithm","level":5,"score":0.45569485425949097},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4424932301044464},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39967069029808044},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.38115930557250977}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2009.4796503","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796503","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1963827069","https://openalex.org/W1974817122","https://openalex.org/W2004976090","https://openalex.org/W2022525681","https://openalex.org/W2047021623","https://openalex.org/W2072176619","https://openalex.org/W2095605665","https://openalex.org/W2100045639","https://openalex.org/W2111380787","https://openalex.org/W2119177527","https://openalex.org/W2132449870","https://openalex.org/W2164316519","https://openalex.org/W2165074206","https://openalex.org/W3146625396","https://openalex.org/W4229969610","https://openalex.org/W4231070018","https://openalex.org/W4235331188","https://openalex.org/W4241166746","https://openalex.org/W4244816354","https://openalex.org/W6679405994"],"related_works":["https://openalex.org/W2098406302","https://openalex.org/W2535115842","https://openalex.org/W1584415117","https://openalex.org/W2121191383","https://openalex.org/W1998391448","https://openalex.org/W2546991807","https://openalex.org/W2115782696","https://openalex.org/W3145643808","https://openalex.org/W2156586505","https://openalex.org/W1581731722"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"present":[4],"a":[5,25,50,129],"novel":[6],"HitME":[7,22,42,119],"(Hit-MEmory)":[8],"buffer":[9,23,43,120],"to":[10,79,107,158,172],"reduce":[11,122],"the":[12,61,64,72,80,95,103,108,116,123,132,136,146],"energy":[13,133,149,166],"consumption":[14,134,150],"of":[15,84,105,118,135,154,168],"memory":[16,29,35,39,62,66,85,137,162],"hierarchy":[17],"in":[18,128,131,141],"embedded":[19],"processors.":[20],"The":[21,41,75],"is":[24,31,44,49,58,68,99],"small":[26],"direct-mapped":[27],"cache":[28,38,57,110,125,143,147,161,174,178],"that":[30,82,115],"added":[32],"as":[33],"additional":[34],"into":[36],"existing":[37],"hierarchies.":[40],"loaded":[45],"only":[46,88],"when":[47,156,170],"there":[48],"hit":[51],"on":[52],"L1":[53,56,73,109,124,142,160],"cache.":[54,74,96],"Otherwise,":[55],"updated":[59],"from":[60,71],"and":[63,91,164],"processor's":[65],"request":[67],"served":[69],"directly":[70],"strategy":[76],"works":[77],"due":[78],"fact":[81],"90%":[83],"accesses":[86,106,126,144],"are":[87],"accessed":[89],"once,":[90],"these":[92],"often":[93],"pollute":[94],"Energy":[97],"reduction":[98,130,167],"achieved":[100],"by":[101,151],"reducing":[102],"number":[104],"memory.":[111],"Experimental":[112],"results":[113],"show":[114],"use":[117],"will":[121],"resulting":[127],"hierarchy.":[138],"This":[139],"decrease":[140],"reduces":[145],"system":[148],"an":[152,165],"average":[153],"60.9%":[155],"compared":[157,171],"traditional":[159],"architecture":[163,175],"6.4%":[169],"filter":[173],"for":[176],"70nm":[177],"technology.":[179]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
