{"id":"https://openalex.org/W4251497353","doi":"https://doi.org/10.1109/aspdac.2009.4796444","title":"Tolerating process variations in high-level synthesis using transparent latches","display_name":"Tolerating process variations in high-level synthesis using transparent latches","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W4251497353","doi":"https://doi.org/10.1109/aspdac.2009.4796444"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2009.4796444","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796444","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100722125","display_name":"Yibo Chen","orcid":"https://orcid.org/0000-0001-6054-207X"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yibo Chen","raw_affiliation_strings":["Department of Computer Science and Engineering, Pennsylvania State University, University Park, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Pennsylvania State University, University Park, PA, USA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100385336","display_name":"Yuan Xie","orcid":"https://orcid.org/0000-0003-2093-1788"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yuan Xie","raw_affiliation_strings":["Department of Computer Science and Engineering, Pennsylvania State University, University Park, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Pennsylvania State University, University Park, PA, USA","institution_ids":["https://openalex.org/I130769515"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130769515"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"73","last_page":"78"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7287379503250122},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.6931279897689819},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.6550451517105103},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.6470255851745605},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5809346437454224},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5491769313812256},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.4535925090312958},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.44429776072502136},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4121285080909729},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.39812785387039185},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3878993093967438},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2997890114784241},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.1406351923942566},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13725021481513977},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10955861210823059},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10051959753036499},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07807588577270508}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7287379503250122},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.6931279897689819},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.6550451517105103},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6470255851745605},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5809346437454224},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5491769313812256},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.4535925090312958},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.44429776072502136},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4121285080909729},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.39812785387039185},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3878993093967438},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2997890114784241},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1406351923942566},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13725021481513977},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10955861210823059},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10051959753036499},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07807588577270508},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/aspdac.2009.4796444","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2009.4796444","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-133883","is_oa":false,"landing_page_url":"http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=LinksAMR&SrcApp=PARTNER_APP&DestLinkType=FullRecord&DestApp=WOS&KeyUT=000265675400013","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W612784192","https://openalex.org/W1966741973","https://openalex.org/W2006589289","https://openalex.org/W2089192331","https://openalex.org/W2093842169","https://openalex.org/W2102504603","https://openalex.org/W2106565868","https://openalex.org/W2125169487","https://openalex.org/W2131102861","https://openalex.org/W2163262735","https://openalex.org/W2484538995","https://openalex.org/W2494575927","https://openalex.org/W4246641361","https://openalex.org/W4247816723","https://openalex.org/W6676119649","https://openalex.org/W6679569446","https://openalex.org/W6680900816"],"related_works":["https://openalex.org/W2262031297","https://openalex.org/W2024069812","https://openalex.org/W2056378213","https://openalex.org/W2045056374","https://openalex.org/W2298981088","https://openalex.org/W2269990635","https://openalex.org/W2543290882","https://openalex.org/W3013057549","https://openalex.org/W1980040075","https://openalex.org/W1490270176"],"abstract_inverted_index":{"Considering":[0],"process":[1,95],"variability":[2],"at":[3],"the":[4,29,33,46,66,71,92,100,105,124],"behavior":[5],"synthesis":[6,117],"level":[7],"is":[8],"necessary,":[9],"because":[10],"it":[11],"makes":[12],"some":[13],"instances":[14],"of":[15,32,57,94,131,134],"function":[16],"units":[17],"slower":[18],"and":[19,27,61,77,90,102,107],"others":[20],"faster,":[21],"resulting":[22],"in":[23,74,115],"unbalanced":[24],"control":[25],"steps":[26],"reducing":[28],"attainable":[30],"frequency":[31],"circuit.":[34],"To":[35],"tackle":[36],"this":[37,39],"problem,":[38],"paper":[40,67],"proposes":[41],"a":[42],"methodology":[43],"to":[44,52,81,86],"replace":[45,82],"edge-trigged":[47],"flip-flops":[48,83],"by":[49],"transparent":[50],"latches,":[51],"exploit":[53],"latches'":[54],"extra":[55],"ability":[56],"passing":[58],"time":[59],"slacks":[60],"tolerating":[62],"delay":[63],"variations.":[64,96],"In":[65],"we":[68],"first":[69],"define":[70],"timing":[72,88,135],"yield":[73,89,136],"high-level":[75,116],"synthesis,":[76],"then":[78,98],"present":[79],"how":[80],"with":[84,138],"latches":[85],"improve":[87],"mitigate":[91],"impact":[93],"We":[97],"discuss":[99],"benefits":[101],"overheads":[103],"for":[104,112],"replacement,":[106],"propose":[108],"an":[109,129],"optimization":[110],"framework":[111],"latch":[113],"replacement":[114],"design":[118,126],"flow.":[119],"Experimental":[120],"results":[121],"show":[122],"that":[123],"latch-based":[125],"can":[127],"achieve":[128],"average":[130],"27%":[132],"improvement":[133],"compared":[137],"traditional":[139],"flip-flop":[140],"based":[141],"design.":[142]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
