{"id":"https://openalex.org/W4240642677","doi":"https://doi.org/10.1109/aspdac.2006.1594794","title":"An SPU reference model for simulation, random test generation and verification","display_name":"An SPU reference model for simulation, random test generation and verification","publication_year":2006,"publication_date":"2006-03-22","ids":{"openalex":"https://openalex.org/W4240642677","doi":"https://doi.org/10.1109/aspdac.2006.1594794"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2006.1594794","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2006.1594794","pdf_url":null,"source":{"id":"https://openalex.org/S4363608292","display_name":"Asia and South Pacific Conference on Design Automation, 2006.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Asia and South Pacific Conference on Design Automation, 2006.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080569004","display_name":"Y. Watanabe","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Watanabe","raw_affiliation_strings":["Toshiba Corporation Semiconductor Company, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Toshiba Corporation Semiconductor Company, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071654847","display_name":"B. Sallay","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Sallay","raw_affiliation_strings":["IBM, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043037606","display_name":"B. Michael","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Michael","raw_affiliation_strings":["IBM, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027251340","display_name":"Daiki Hiraoka","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Hiraoka","raw_affiliation_strings":["Sony Computer Entertainment, Inc., Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sony Computer Entertainment, Inc., Tokyo, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001501483","display_name":"D. Brokenshire","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Brokenshire","raw_affiliation_strings":["IBM, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034459016","display_name":"G. Meil","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Meil","raw_affiliation_strings":["IBM, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077065748","display_name":"H. Shafi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Shafi","raw_affiliation_strings":["IBM, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.46030549,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"31","issue":null,"first_page":"860","last_page":"866"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9711999893188477,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9660999774932861,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8124474287033081},{"id":"https://openalex.org/keywords/reference-model","display_name":"Reference model","score":0.6102039813995361},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5779627561569214},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5395144820213318},{"id":"https://openalex.org/keywords/reference-architecture","display_name":"Reference architecture","score":0.4523587226867676},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.41441810131073},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.41323572397232056},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4131092429161072},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4043703079223633},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3986814618110657},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.348677396774292},{"id":"https://openalex.org/keywords/software-architecture","display_name":"Software architecture","score":0.30695924162864685},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.26864510774612427},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1916172206401825},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17308881878852844}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8124474287033081},{"id":"https://openalex.org/C150189527","wikidata":"https://www.wikidata.org/wiki/Q356674","display_name":"Reference model","level":2,"score":0.6102039813995361},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5779627561569214},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5395144820213318},{"id":"https://openalex.org/C55356503","wikidata":"https://www.wikidata.org/wiki/Q2136675","display_name":"Reference architecture","level":4,"score":0.4523587226867676},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.41441810131073},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.41323572397232056},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4131092429161072},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4043703079223633},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3986814618110657},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.348677396774292},{"id":"https://openalex.org/C35869016","wikidata":"https://www.wikidata.org/wiki/Q846636","display_name":"Software architecture","level":3,"score":0.30695924162864685},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.26864510774612427},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1916172206401825},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17308881878852844},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2006.1594794","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2006.1594794","pdf_url":null,"source":{"id":"https://openalex.org/S4363608292","display_name":"Asia and South Pacific Conference on Design Automation, 2006.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Asia and South Pacific Conference on Design Automation, 2006.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1575732703","https://openalex.org/W2005961863","https://openalex.org/W2136357775","https://openalex.org/W2162991651"],"related_works":["https://openalex.org/W2043258212","https://openalex.org/W4245365057","https://openalex.org/W47442879","https://openalex.org/W2135336109","https://openalex.org/W4366609676","https://openalex.org/W2055504431","https://openalex.org/W4231475082","https://openalex.org/W2131879803","https://openalex.org/W1583260306","https://openalex.org/W2996307556"],"abstract_inverted_index":{"An":[0],"instruction":[1,41],"set":[2,42],"level":[3],"reference":[4,31,53,66,92],"model":[5,32,67,93],"was":[6,33],"developed":[7],"for":[8,35,45,51,59,68,101],"the":[9,20,24,36,40,46,52,55,60,64,78,82,86,91,95,99,102],"development":[10],"of":[11,19,23,85],"synergistic":[12],"processing":[13],"unit":[14],"(SPU),":[15],"which":[16],"is":[17],"one":[18],"key":[21],"components":[22],"cell":[25],"processor":[26],"[Pham,":[27],"2005][Flachs,":[28],"2005].":[29],"This":[30],"used":[34],"simulators":[37],"to":[38,74,110,117],"define":[39],"architecture":[43,79],"(ISA),":[44],"random":[47,103],"test":[48,104],"case":[49],"generator,":[50],"in":[54,94],"verification":[56],"environment":[57,97],"and":[58,106],"software":[61],"development.":[62,88],"Using":[63],"same":[65],"multiple":[69],"purposes":[70],"made":[71,107],"it":[72,108],"easier":[73],"keep":[75],"up":[76],"with":[77],"changes":[80],"at":[81],"early":[83],"stage":[84],"microprocessor":[87],"Also":[89],"including":[90],"simulation":[96],"increased":[98],"robustness":[100],"executions":[105],"possible":[109],"find":[111],"bugs":[112],"that":[113],"are":[114],"usually":[115],"difficult":[116],"catch.":[118]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}