{"id":"https://openalex.org/W4243988216","doi":"https://doi.org/10.1109/aspdac.2006.1594732","title":"POSIX modeling in systemC","display_name":"POSIX modeling in systemC","publication_year":2006,"publication_date":"2006-03-22","ids":{"openalex":"https://openalex.org/W4243988216","doi":"https://doi.org/10.1109/aspdac.2006.1594732"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2006.1594732","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2006.1594732","pdf_url":null,"source":{"id":"https://openalex.org/S4363608292","display_name":"Asia and South Pacific Conference on Design Automation, 2006.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Asia and South Pacific Conference on Design Automation, 2006.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057840869","display_name":"H. Posadas","orcid":null},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"H. Posadas","raw_affiliation_strings":["Microelectronics Engineering Group, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"Microelectronics Engineering Group, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043184086","display_name":"J. Adamez","orcid":null},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J. Adamez","raw_affiliation_strings":["Microelectronics Engineering Group, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"Microelectronics Engineering Group, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053332372","display_name":"P. Sanchez","orcid":null},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"P. Sanchez","raw_affiliation_strings":["Microelectronics Engineering Group, University of Cantabria, Santander, Brazil"],"affiliations":[{"raw_affiliation_string":"Microelectronics Engineering Group, University of Cantabria, Santander, Brazil","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032788928","display_name":"Eugenio Villar","orcid":"https://orcid.org/0000-0002-6541-6176"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"E. Villar","raw_affiliation_strings":["Microelectronics Engineering Group, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"Microelectronics Engineering Group, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014493478","display_name":"F. Blasco","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"F. Blasco","raw_affiliation_strings":["DS2, Valencia, Spain"],"affiliations":[{"raw_affiliation_string":"DS2, Valencia, Spain","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5057840869"],"corresponding_institution_ids":["https://openalex.org/I13134134"],"apc_list":null,"apc_paid":null,"fwci":1.47845805,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.81639344,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"485","last_page":"490"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9451366662979126},{"id":"https://openalex.org/keywords/posix","display_name":"POSIX","score":0.8977500796318054},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8527714014053345},{"id":"https://openalex.org/keywords/posix-threads","display_name":"POSIX Threads","score":0.7062080502510071},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6271601319313049},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5270117521286011},{"id":"https://openalex.org/keywords/real-time-operating-system","display_name":"Real-time operating system","score":0.5202942490577698},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4224318265914917},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.41850265860557556},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3687788248062134},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3421373963356018}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9451366662979126},{"id":"https://openalex.org/C532756234","wikidata":"https://www.wikidata.org/wiki/Q14658","display_name":"POSIX","level":2,"score":0.8977500796318054},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8527714014053345},{"id":"https://openalex.org/C41138395","wikidata":"https://www.wikidata.org/wiki/Q928112","display_name":"POSIX Threads","level":3,"score":0.7062080502510071},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6271601319313049},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5270117521286011},{"id":"https://openalex.org/C28472234","wikidata":"https://www.wikidata.org/wiki/Q213666","display_name":"Real-time operating system","level":2,"score":0.5202942490577698},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4224318265914917},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.41850265860557556},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3687788248062134},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3421373963356018},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2006.1594732","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2006.1594732","pdf_url":null,"source":{"id":"https://openalex.org/S4363608292","display_name":"Asia and South Pacific Conference on Design Automation, 2006.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Asia and South Pacific Conference on Design Automation, 2006.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W28644840","https://openalex.org/W1530170095","https://openalex.org/W1553982917","https://openalex.org/W1583548393","https://openalex.org/W2023663556","https://openalex.org/W2024800288","https://openalex.org/W2103591545","https://openalex.org/W2123654501","https://openalex.org/W2135056409","https://openalex.org/W2138863419","https://openalex.org/W2155900476","https://openalex.org/W2157559950","https://openalex.org/W2169782229","https://openalex.org/W4242270144","https://openalex.org/W4247732906","https://openalex.org/W4250350778","https://openalex.org/W6633061758","https://openalex.org/W6679734440"],"related_works":["https://openalex.org/W4230580429","https://openalex.org/W1901085887","https://openalex.org/W2556689029","https://openalex.org/W614734992","https://openalex.org/W4243833290","https://openalex.org/W2049324807","https://openalex.org/W4243850526","https://openalex.org/W2397962676","https://openalex.org/W3200772988","https://openalex.org/W2889334776"],"abstract_inverted_index":{"Early":[0],"estimation":[1,24,116],"of":[2,6,31,92,117,120,126],"the":[3,29,32,73,75,89,93,98,106,118,121,127],"execution":[4,22,90],"time":[5,23,91,147],"real-time":[7],"embedded":[8,17],"SW":[9,21,95],"is":[10,40,69,81,133,148],"an":[11,42,112],"essential":[12],"task":[13],"in":[14],"complex,":[15],"HW/SW":[16,52],"system":[18,122],"design.":[19],"Application":[20],"requires":[25],"taking":[26],"into":[27,84],"account":[28],"impact":[30],"underlying":[33],"RTOS.":[34],"As":[35],"a":[36,48,61,85,124],"consequence,":[37],"RTOS":[38],"modeling":[39,66],"becoming":[41],"active":[43],"research":[44],"area.":[45],"SystemC":[46,62,76],"provides":[47,111],"framework":[49],"for":[50,64],"multiprocessing,":[51],"co-simulation":[53],"at":[54],"several":[55],"abstraction":[56],"levels.":[57],"In":[58],"this":[59],"paper,":[60],"library":[63,102],"POSIX":[65,79,99],"and":[67,114],"simulation":[68,87,146],"presented.":[70],"By":[71],"using":[72,78,137],"library,":[74],"specification":[77],"functions":[80],"converted":[82],"automatically":[83],"timed":[86],"estimating":[88],"application":[94],"running":[96],"on":[97,105],"platform.":[100],"The":[101],"works":[103],"directly":[104],"source":[107],"code.":[108],"Therefore,":[109],"it":[110,140],"early":[113],"fast":[115],"performance":[119],"as":[123,145],"consequence":[125],"architectural":[128],"mapping":[129],"decisions.":[130],"Although":[131],"accuracy":[132],"lower":[134],"than":[135,151],"when":[136],"lower-level":[138],"techniques,":[139],"supports":[141],"high-level":[142],"design-space":[143],"exploration":[144],"significantly":[149],"less":[150],"RT":[152],"(ISS)":[153],"simulation.":[154]},"counts_by_year":[{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}