{"id":"https://openalex.org/W7134930311","doi":"https://doi.org/10.1109/asp-dac66049.2026.11420667","title":"MOSTAR: Multi-Stage Hierarchical Bayesian Optimization for Substructure-Aware High-Dimensional Analog Circuit Sizing","display_name":"MOSTAR: Multi-Stage Hierarchical Bayesian Optimization for Substructure-Aware High-Dimensional Analog Circuit Sizing","publication_year":2026,"publication_date":"2026-01-19","ids":{"openalex":"https://openalex.org/W7134930311","doi":"https://doi.org/10.1109/asp-dac66049.2026.11420667"},"language":null,"primary_location":{"id":"doi:10.1109/asp-dac66049.2026.11420667","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac66049.2026.11420667","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100314186","display_name":"Weijian Fan","orcid":"https://orcid.org/0009-0006-4522-2194"},"institutions":[{"id":"https://openalex.org/I4210110387","display_name":"Microelectronica (Romania)","ror":"https://ror.org/01keak954","country_code":"RO","type":"company","lineage":["https://openalex.org/I4210110387"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Weijian Fan","raw_affiliation_strings":["School of Software and Microelectronic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Software and Microelectronic","institution_ids":["https://openalex.org/I4210110387"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085962219","display_name":"Haoyi Zhang","orcid":"https://orcid.org/0009-0004-2763-545X"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haoyi Zhang","raw_affiliation_strings":["Peking University,School of Integrated Circuits"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Weibin Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weibin Lin","raw_affiliation_strings":["Shenzhen University,The College of Mechatronics and Control Engineering"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shenzhen University,The College of Mechatronics and Control Engineering","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128696105","display_name":"Runsheng Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Runsheng Wang","raw_affiliation_strings":["Peking University,School of Integrated Circuits"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000933188","display_name":"Yibo Lin","orcid":"https://orcid.org/0000-0002-0977-2774"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yibo Lin","raw_affiliation_strings":["Peking University,School of Integrated Circuits"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"653","last_page":"659"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.33959999680519104,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.33959999680519104,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.19609999656677246,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.10769999772310257,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.4860000014305115},{"id":"https://openalex.org/keywords/bayesian-probability","display_name":"Bayesian probability","score":0.4410000145435333},{"id":"https://openalex.org/keywords/bayesian-optimization","display_name":"Bayesian optimization","score":0.38190001249313354},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.2630999982357025},{"id":"https://openalex.org/keywords/constrained-optimization","display_name":"Constrained optimization","score":0.25679999589920044}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6021000146865845},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.4860000014305115},{"id":"https://openalex.org/C107673813","wikidata":"https://www.wikidata.org/wiki/Q812534","display_name":"Bayesian probability","level":2,"score":0.4410000145435333},{"id":"https://openalex.org/C2778049539","wikidata":"https://www.wikidata.org/wiki/Q17002908","display_name":"Bayesian optimization","level":2,"score":0.38190001249313354},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33149999380111694},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.2847999930381775},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2630999982357025},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2596000134944916},{"id":"https://openalex.org/C55660270","wikidata":"https://www.wikidata.org/wiki/Q5164377","display_name":"Constrained optimization","level":2,"score":0.25679999589920044},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.25619998574256897},{"id":"https://openalex.org/C58328972","wikidata":"https://www.wikidata.org/wiki/Q184609","display_name":"Expert system","level":2,"score":0.2547999918460846},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2533000111579895}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asp-dac66049.2026.11420667","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac66049.2026.11420667","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W653191948","https://openalex.org/W1964007738","https://openalex.org/W2126105956","https://openalex.org/W2138252514","https://openalex.org/W2143381319","https://openalex.org/W2144133630","https://openalex.org/W2152195021","https://openalex.org/W2192203593","https://openalex.org/W3036312847","https://openalex.org/W3089997764","https://openalex.org/W3092618035","https://openalex.org/W3121642476","https://openalex.org/W3204161648","https://openalex.org/W3213635425","https://openalex.org/W3214495641","https://openalex.org/W4252419006","https://openalex.org/W4315630789","https://openalex.org/W4385679829","https://openalex.org/W4389166678","https://openalex.org/W4393145459","https://openalex.org/W4394564271","https://openalex.org/W4403024110","https://openalex.org/W4404238738","https://openalex.org/W4405778630"],"related_works":[],"abstract_inverted_index":{"Analog":[0],"circuit":[1,10,52,131],"sizing":[2],"is":[3],"a":[4,38,46,96],"critical":[5],"challenge":[6],"due":[7],"to":[8,28,58,71,113],"increasing":[9],"complexity":[11],"and":[12,25,54,66,102,120],"diverse":[13],"performance":[14,107],"requirements.":[15],"Existing":[16],"algorithms":[17],"struggle":[18],"with":[19],"poor":[20],"scalability":[21,73],"in":[22,74,127],"highdimensional":[23,75],"spaces":[24],"frequent":[26],"convergence":[27],"local":[29,86],"optima.":[30],"To":[31],"address":[32],"these":[33],"limitations,":[34],"we":[35],"propose":[36],"MOSTAR,":[37],"multi-stage":[39],"hierarchical":[40],"Bayesian":[41],"optimization":[42,106],"framework":[43],"that":[44,92],"integrates":[45],"local-to-global":[47],"GNN":[48],"(L2G-GNN).":[49],"L2G-GNN":[50,94],"identifies":[51],"substructures":[53],"adds":[55],"symmetric":[56],"constraints":[57],"the":[59],"circuit.":[60],"MOSTAR":[61,103],"employs":[62],"additive":[63],"Gaussian":[64],"processes":[65],"stage-adaptive":[67],"constrained":[68],"acquisition":[69],"function":[70],"improve":[72],"circuits.":[76],"Furthermore,":[77],"its":[78,125],"dynamic":[79],"search":[80],"space":[81],"adjustment":[82],"strategy":[83],"helps":[84],"avoid":[85],"optima":[87],"during":[88],"optimization.":[89],"Experiments":[90],"show":[91],"our":[93],"achieves":[95,104],"substructure":[97],"identification":[98],"accuracy":[99],"of":[100],"97.22%,":[101],"an":[105],"improvement":[108],"ranging":[109],"from":[110],"$1.04":[111],"\\times$":[112,115],"$4.13":[114],"on":[116],"three":[117],"basic":[118],"circuits":[119],"two":[121],"high-dimensional":[122],"circuits,":[123],"highlighting":[124],"efficacy":[126],"automating":[128],"complex":[129],"analog":[130],"sizing.":[132]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-03-12T00:00:00"}