{"id":"https://openalex.org/W4393140659","doi":"https://doi.org/10.1109/asp-dac58780.2024.10473978","title":"TransPlace: A Scalable Transistor-Level Placer for VLSI Beyond Standard-Cell-Based Design","display_name":"TransPlace: A Scalable Transistor-Level Placer for VLSI Beyond Standard-Cell-Based Design","publication_year":2024,"publication_date":"2024-01-22","ids":{"openalex":"https://openalex.org/W4393140659","doi":"https://doi.org/10.1109/asp-dac58780.2024.10473978"},"language":"en","primary_location":{"id":"doi:10.1109/asp-dac58780.2024.10473978","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac58780.2024.10473978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027638590","display_name":"Chen-Hao Hsu","orcid":"https://orcid.org/0000-0002-5787-7212"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chen-Hao Hsu","raw_affiliation_strings":["The University of Texas at Austin,ECE Department,Austin,TX,USA"],"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin,ECE Department,Austin,TX,USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078415010","display_name":"Xiaoqing Xu","orcid":"https://orcid.org/0000-0002-5314-7669"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiaoqing Xu","raw_affiliation_strings":["X, the moonshot factory,Mountain View,CA,USA"],"affiliations":[{"raw_affiliation_string":"X, the moonshot factory,Mountain View,CA,USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100353673","display_name":"Hao Chen","orcid":"https://orcid.org/0009-0001-6480-7976"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hao Chen","raw_affiliation_strings":["X, the moonshot factory,Mountain View,CA,USA"],"affiliations":[{"raw_affiliation_string":"X, the moonshot factory,Mountain View,CA,USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063458272","display_name":"Dino Rui\u0107","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dino Ruic","raw_affiliation_strings":["X, the moonshot factory,Mountain View,CA,USA"],"affiliations":[{"raw_affiliation_string":"X, the moonshot factory,Mountain View,CA,USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011883763","display_name":"David Z. Pan","orcid":"https://orcid.org/0000-0002-5705-2501"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Z. Pan","raw_affiliation_strings":["The University of Texas at Austin,ECE Department,Austin,TX,USA"],"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin,ECE Department,Austin,TX,USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5027638590"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":0.8718,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.7210073,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"312","last_page":"318"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7943148612976074},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.6460191011428833},{"id":"https://openalex.org/keywords/placer-mining","display_name":"Placer mining","score":0.632720410823822},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5871751308441162},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5580125451087952},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5243275761604309},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46195507049560547},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.42214587330818176},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.341081440448761},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22704127430915833},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.1969035267829895},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19374790787696838},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.17144787311553955},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10428911447525024},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.06369546055793762}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7943148612976074},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6460191011428833},{"id":"https://openalex.org/C43592290","wikidata":"https://www.wikidata.org/wiki/Q12148490","display_name":"Placer mining","level":2,"score":0.632720410823822},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5871751308441162},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5580125451087952},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5243275761604309},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46195507049560547},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.42214587330818176},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.341081440448761},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22704127430915833},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.1969035267829895},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19374790787696838},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.17144787311553955},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10428911447525024},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.06369546055793762},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asp-dac58780.2024.10473978","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac58780.2024.10473978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6600000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1518705996","https://openalex.org/W1967661769","https://openalex.org/W1985292881","https://openalex.org/W2009815534","https://openalex.org/W2061080621","https://openalex.org/W2167190617","https://openalex.org/W2346205343","https://openalex.org/W2625242388","https://openalex.org/W2946715554","https://openalex.org/W3091734033","https://openalex.org/W3100453629","https://openalex.org/W3174654674","https://openalex.org/W4223927598","https://openalex.org/W4234143391","https://openalex.org/W4293023239","https://openalex.org/W6779530380"],"related_works":["https://openalex.org/W2103645363","https://openalex.org/W2072989701","https://openalex.org/W1738647919","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W3000179092","https://openalex.org/W2050511294","https://openalex.org/W101478184","https://openalex.org/W2118321428","https://openalex.org/W1986774039"],"abstract_inverted_index":{"The":[0],"standard-cell":[1],"methodology":[2],"is":[3,103],"widely":[4],"adopted":[5],"in":[6,52,68,126],"the":[7,25,97,114,134],"VLSI":[8],"design":[9,20,54,131],"flow":[10],"due":[11],"to":[12,59,83],"its":[13,36,124],"scalability,":[14],"reusability,":[15],"and":[16,28,32,45,71,118,129],"compatibility":[17],"with":[18],"electronic":[19],"automation":[21],"(EDA)":[22],"tools.":[23],"However,":[24],"fixed":[26],"positions":[27],"confinement":[29],"of":[30,105,110,136],"PMOS":[31],"NMOS":[33],"transistors":[34,51,111],"within":[35],"standard":[37,91],"cell":[38],"layout":[39],"impose":[40],"limitations":[41],"on":[42],"overall":[43,115],"wirelength":[44,70,119,128],"area":[46,132],"optimization.":[47,120],"Directly":[48],"placing":[49],"individual":[50],"a":[53,84,89,107],"can":[55,65],"provide":[56],"greater":[57],"flexibility":[58],"explore":[60],"more":[61],"diffusion-sharing":[62],"opportunities,":[63],"which":[64],"potentially":[66],"result":[67],"less":[69],"areas":[72],"than":[73],"standard-cell-based":[74,137],"designs.":[75,138],"Unfortunately,":[76],"existing":[77],"transistor":[78],"placement":[79,100],"approaches":[80],"are":[81],"limited":[82],"very":[85],"small":[86],"scale,":[87],"e.g.,":[88],"single":[90],"cell.":[92],"This":[93],"paper":[94],"presents":[95],"TransPlace,":[96],"first":[98],"transistor-level":[99],"framework":[101],"that":[102],"capable":[104],"handling":[106],"large":[108],"number":[109],"while":[112],"considering":[113],"diffusion":[116],"sharing":[117],"Experimental":[121],"results":[122],"demonstrate":[123],"effectiveness":[125],"minimizing":[127],"reducing":[130],"beyond":[133],"limits":[135]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}
