{"id":"https://openalex.org/W4393146727","doi":"https://doi.org/10.1109/asp-dac58780.2024.10473973","title":"Effective Analytical Placement for Advanced Hybrid-Row-Height Circuit Designs","display_name":"Effective Analytical Placement for Advanced Hybrid-Row-Height Circuit Designs","publication_year":2024,"publication_date":"2024-01-22","ids":{"openalex":"https://openalex.org/W4393146727","doi":"https://doi.org/10.1109/asp-dac58780.2024.10473973"},"language":"en","primary_location":{"id":"doi:10.1109/asp-dac58780.2024.10473973","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac58780.2024.10473973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Yuan Wen","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yuan Wen","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC &#x0026; System,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC &#x0026; System,Shanghai,China,200433","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101308212","display_name":"Benchao Zhu","orcid":"https://orcid.org/0009-0005-6598-3938"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Benchao Zhu","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC &#x0026; System,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC &#x0026; System,Shanghai,China,200433","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101664594","display_name":"Zhifeng Lin","orcid":"https://orcid.org/0000-0002-4597-4322"},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhifeng Lin","raw_affiliation_strings":["Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108"],"affiliations":[{"raw_affiliation_string":"Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101854580","display_name":"Jianli Chen","orcid":"https://orcid.org/0000-0002-1391-2696"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianli Chen","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC &#x0026; System,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC &#x0026; System,Shanghai,China,200433","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.6095,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.65451893,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"300","last_page":"305"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5632268786430359},{"id":"https://openalex.org/keywords/placement","display_name":"Placement","score":0.42322778701782227},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3693617582321167},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32797932624816895},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3017892837524414},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21124497056007385},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.2087753415107727},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.16460639238357544}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5632268786430359},{"id":"https://openalex.org/C117690923","wikidata":"https://www.wikidata.org/wiki/Q1484784","display_name":"Placement","level":4,"score":0.42322778701782227},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3693617582321167},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32797932624816895},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3017892837524414},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21124497056007385},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.2087753415107727},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.16460639238357544}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asp-dac58780.2024.10473973","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac58780.2024.10473973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1985292881","https://openalex.org/W2020461489","https://openalex.org/W2025163728","https://openalex.org/W2120129706","https://openalex.org/W2161629461","https://openalex.org/W2170574782","https://openalex.org/W2625242388","https://openalex.org/W3036696276","https://openalex.org/W3111205547","https://openalex.org/W4213052111","https://openalex.org/W4248241425","https://openalex.org/W4249999223","https://openalex.org/W4252332481","https://openalex.org/W6661169969"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2478288626","https://openalex.org/W4391913857","https://openalex.org/W2914442136","https://openalex.org/W2209132829"],"abstract_inverted_index":{"Recently,":[0],"hybrid-row-height":[1,41,75,110,121],"designs":[2,16],"have":[3],"been":[4],"introduced":[5],"to":[6,20,23,38,71,108,141,154],"achieve":[7,176],"performance":[8],"and":[9,27,51,96,182],"area":[10],"co-optimization":[11],"in":[12,44,60],"advanced":[13],"nodes.":[14],"Hybrid-row-height":[15],"incur":[17],"challenging":[18],"issues":[19],"layout":[21],"due":[22],"the":[24,40,56,67,74,109,115,120,133,143,161,166],"heterogeneous":[25],"cell":[26],"row":[28],"structures.":[29],"In":[30,114],"this":[31],"paper,":[32],"we":[33,65,118],"present":[34],"an":[35],"effective":[36],"algorithm":[37,174],"address":[39],"placement":[42,77,112],"problem":[43,78,123],"two":[45,80],"major":[46],"stages:":[47],"(1)":[48],"global":[49,76,111,148],"placement,":[50],"(2)":[52],"legalization.":[53],"Inspired":[54],"by":[55],"multi-channel":[57],"processing":[58],"method":[59,139],"convolutional":[61],"neural":[62],"networks":[63],"(CNN),":[64],"use":[66],"feature":[68],"extraction":[69],"technique":[70],"equivalently":[72],"transform":[73],"into":[79,124],"sub-problems":[81],"that":[82,172],"can":[83,103,175],"be":[84],"solved":[85],"effectively.":[86],"We":[87],"propose":[88],"a":[89,97,105,125],"multi-layer":[90],"nonlinear":[91],"framework":[92],"with":[93,160],"alignment":[94],"guidance":[95],"self-adaptive":[98],"parameter":[99],"adjustment":[100],"scheme,":[101],"which":[102],"obtain":[104],"high-quality":[106],"solution":[107],"problem.":[113],"legalization":[116,122],"stage,":[117],"formulate":[119],"convex":[126],"quadratic":[127],"programming":[128],"(QP)":[129],"problem,":[130],"then":[131],"apply":[132],"robust":[134],"modulus-based":[135],"matrix":[136],"splitting":[137],"iteration":[138],"(RMMSIM)":[140],"solve":[142],"QP":[144],"efficiently.":[145],"After":[146],"RMMSIM-based":[147],"legalization,":[149],"Tetris-like":[150],"allocation":[151],"is":[152],"used":[153],"resolve":[155],"remaining":[156],"physical":[157],"violations.":[158],"Compared":[159],"state-of-the-art":[162],"work,":[163],"experiments":[164],"on":[165],"2015":[167],"ISPD":[168],"Contest":[169],"benchmarks":[170],"show":[171],"our":[173],"7%;":[177],"shorter":[178],"final":[179],"total":[180],"wirelength":[181],"$2.23":[183],"\\times":[184],"$":[185],"speedup.":[186]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}
