{"id":"https://openalex.org/W4393145459","doi":"https://doi.org/10.1109/asp-dac58780.2024.10473892","title":"Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing","display_name":"Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing","publication_year":2024,"publication_date":"2024-01-22","ids":{"openalex":"https://openalex.org/W4393145459","doi":"https://doi.org/10.1109/asp-dac58780.2024.10473892"},"language":"en","primary_location":{"id":"doi:10.1109/asp-dac58780.2024.10473892","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac58780.2024.10473892","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108811434","display_name":"Xiaolan Zhao","orcid":"https://orcid.org/0000-0001-8977-2725"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xuyang Zhao","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039204202","display_name":"Zhaori Bi","orcid":"https://orcid.org/0000-0002-7315-3150"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhaori Bi","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037328458","display_name":"Changhao Yan","orcid":"https://orcid.org/0000-0002-8936-3945"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Changhao Yan","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101411514","display_name":"Fan Yang","orcid":"https://orcid.org/0000-0001-9604-913X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Yang","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075023753","display_name":"Ye Lu","orcid":"https://orcid.org/0000-0002-8729-0316"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ye Lu","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054960059","display_name":"Dian Zhou","orcid":"https://orcid.org/0000-0002-2648-5232"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dian Zhou","raw_affiliation_strings":["University of Texas at Dallas,Department of Electrical Engineering,U.S.A"],"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas,Department of Electrical Engineering,U.S.A","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064213921","display_name":"Xuan Zeng","orcid":"https://orcid.org/0000-0002-8097-4053"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuan Zeng","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips &#x0026; System,China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5108811434"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.6538,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.66787988,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"872","last_page":"877"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7386018633842468},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6987515687942505},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.6890252828598022},{"id":"https://openalex.org/keywords/bayesian-optimization","display_name":"Bayesian optimization","score":0.5457640290260315},{"id":"https://openalex.org/keywords/bayesian-probability","display_name":"Bayesian probability","score":0.5435776710510254},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3360239863395691},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.21951636672019958},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13780787587165833},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06761345267295837}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7386018633842468},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6987515687942505},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.6890252828598022},{"id":"https://openalex.org/C2778049539","wikidata":"https://www.wikidata.org/wiki/Q17002908","display_name":"Bayesian optimization","level":2,"score":0.5457640290260315},{"id":"https://openalex.org/C107673813","wikidata":"https://www.wikidata.org/wiki/Q812534","display_name":"Bayesian probability","level":2,"score":0.5435776710510254},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3360239863395691},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.21951636672019958},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13780787587165833},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06761345267295837},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asp-dac58780.2024.10473892","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac58780.2024.10473892","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1502922572","https://openalex.org/W1964239621","https://openalex.org/W1998752433","https://openalex.org/W2042341775","https://openalex.org/W2065183815","https://openalex.org/W2126105956","https://openalex.org/W2135907574","https://openalex.org/W2612924526","https://openalex.org/W2736440494","https://openalex.org/W2742044854","https://openalex.org/W2769791151","https://openalex.org/W2970039673","https://openalex.org/W2989851762","https://openalex.org/W3021613070","https://openalex.org/W3035677605","https://openalex.org/W3092488979","https://openalex.org/W3100083105","https://openalex.org/W3113331478","https://openalex.org/W3213635425","https://openalex.org/W4205540825","https://openalex.org/W4252419006","https://openalex.org/W4285152899","https://openalex.org/W4287180800","https://openalex.org/W6689169915","https://openalex.org/W6751513613","https://openalex.org/W6762724357","https://openalex.org/W6780116775","https://openalex.org/W6786190416","https://openalex.org/W6795637285"],"related_works":["https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2373777250","https://openalex.org/W2353956655","https://openalex.org/W2020653254","https://openalex.org/W2010454064","https://openalex.org/W2352072014","https://openalex.org/W217279133","https://openalex.org/W2393487946","https://openalex.org/W2373310108"],"abstract_inverted_index":{"For":[0],"analog":[1],"circuit":[2],"sizing,":[3],"constrained":[4],"multi-objective":[5,126],"optimization":[6,30,118,127],"is":[7,96],"an":[8,37,97],"important":[9],"and":[10,19],"practical":[11],"problem.":[12],"With":[13],"the":[14,27,47,50,62,73,79,82,90,122],"popularity":[15],"of":[16,29,75],"multi-core":[17],"machines":[18],"cloud":[20],"computing,":[21],"parallel/batch":[22],"computing":[23],"can":[24,109],"significantly":[25],"improve":[26],"efficiency":[28],"algorithms.":[31],"In":[32],"this":[33],"paper,":[34],"we":[35,54],"propose":[36],"Asynchronous":[38],"Batch":[39],"Constrained":[40],"Multi-Objective":[41],"Bayesian":[42],"Optimization":[43],"algorithm":[44],"(ABCMOBO).":[45],"Since":[46],"performances":[48],"below":[49],"specifications":[51],"are":[52],"worthless,":[53],"adopt":[55],"a":[56],"dynamic":[57],"reference":[58],"point":[59,93],"selection":[60],"on":[61],"expected":[63],"hypervolume":[64],"improvement":[65],"acquisition":[66],"function":[67],"for":[68,77],"constraint":[69],"handling.":[70],"To":[71],"save":[72],"time":[74],"waiting":[76],"all":[78],"simulations":[80],"in":[81],"same":[83],"batch":[84,125],"to":[85,121],"complete,":[86],"ABCMOBO":[87],"asynchronously":[88],"evaluates":[89],"next":[91],"candidate":[92],"if":[94],"there":[95],"idle":[98],"worker.":[99],"The":[100],"experimental":[101],"results":[102,119],"quantitatively":[103],"demonstrate":[104],"that":[105],"our":[106],"proposed":[107],"algorithms":[108],"reach":[110],"3.49":[111],"~":[112],"$8.18":[113],"\\times$":[114],"speed-up":[115],"with":[116],"comparable":[117],"compared":[120],"state-of-the-art":[123],"asynchronous/synchronous":[124],"methods.":[128]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}
