{"id":"https://openalex.org/W4213079544","doi":"https://doi.org/10.1109/asp-dac52403.2022.9712482","title":"Signal-Integrity-Aware Interposer Bus Routing in 2.5D Heterogeneous Integration","display_name":"Signal-Integrity-Aware Interposer Bus Routing in 2.5D Heterogeneous Integration","publication_year":2022,"publication_date":"2022-01-17","ids":{"openalex":"https://openalex.org/W4213079544","doi":"https://doi.org/10.1109/asp-dac52403.2022.9712482"},"language":"en","primary_location":{"id":"doi:10.1109/asp-dac52403.2022.9712482","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac52403.2022.9712482","pdf_url":null,"source":{"id":"https://openalex.org/S4363608500","display_name":"2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030207377","display_name":"Sung-Yun Lee","orcid":"https://orcid.org/0000-0002-4141-6411"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Sung-Yun Lee","raw_affiliation_strings":["Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100644921","display_name":"Daeyeon Kim","orcid":"https://orcid.org/0000-0002-5879-8313"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Daeyeon Kim","raw_affiliation_strings":["Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077052572","display_name":"Kyungjun Min","orcid":"https://orcid.org/0000-0002-4965-5484"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyungjun Min","raw_affiliation_strings":["Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044543389","display_name":"Seokhyeong Kang","orcid":"https://orcid.org/0000-0003-3015-1806"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seokhyeong Kang","raw_affiliation_strings":["Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology,Dept. of Electrical Engineering,Pohang,Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Pohang University of Science and Technology, Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5030207377"],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":1.6003,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80571876,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"178","last_page":"183"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.8387847542762756},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.7725246548652649},{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.7281030416488647},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6301947832107544},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5782793164253235},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5751620531082153},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5101483464241028},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.48469117283821106},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.42755380272865295},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3974127769470215},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3675028085708618},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.27772659063339233},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23242142796516418},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18342658877372742},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.18287113308906555}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.8387847542762756},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.7725246548652649},{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.7281030416488647},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6301947832107544},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5782793164253235},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5751620531082153},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5101483464241028},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.48469117283821106},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.42755380272865295},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3974127769470215},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3675028085708618},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.27772659063339233},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23242142796516418},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18342658877372742},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.18287113308906555},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/asp-dac52403.2022.9712482","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asp-dac52403.2022.9712482","pdf_url":null,"source":{"id":"https://openalex.org/S4363608500","display_name":"2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},{"id":"pmh:oai:oasis.postech.ac.kr:2014.oak/114439","is_oa":false,"landing_page_url":"https://oasis.postech.ac.kr/handle/2014.oak/114439","pdf_url":null,"source":{"id":"https://openalex.org/S4306401965","display_name":"Open Access System for Information Sharing (Pohang University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I123900574","host_organization_name":"Pohang University of Science and Technology","host_organization_lineage":["https://openalex.org/I123900574"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5899999737739563,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W609028723","https://openalex.org/W1506461212","https://openalex.org/W1515364274","https://openalex.org/W1598263447","https://openalex.org/W1994377575","https://openalex.org/W2065653320","https://openalex.org/W2071208935","https://openalex.org/W2082375193","https://openalex.org/W2097371076","https://openalex.org/W2097651508","https://openalex.org/W2108940904","https://openalex.org/W2111561414","https://openalex.org/W2117549011","https://openalex.org/W2121228876","https://openalex.org/W2131413854","https://openalex.org/W2133115271","https://openalex.org/W2141104858","https://openalex.org/W2487925890","https://openalex.org/W2514838290","https://openalex.org/W2534648526","https://openalex.org/W2622148586","https://openalex.org/W2783370179","https://openalex.org/W2801260432","https://openalex.org/W2945408550","https://openalex.org/W2955014244","https://openalex.org/W2966350814","https://openalex.org/W3016874508","https://openalex.org/W3041799050","https://openalex.org/W3134274954","https://openalex.org/W4248230486","https://openalex.org/W6671305378","https://openalex.org/W6677533950","https://openalex.org/W6681120124","https://openalex.org/W6738651271"],"related_works":["https://openalex.org/W2026710642","https://openalex.org/W4386763889","https://openalex.org/W1606557396","https://openalex.org/W2896557720","https://openalex.org/W2044721343","https://openalex.org/W1992573569","https://openalex.org/W2011182927","https://openalex.org/W2142764951","https://openalex.org/W2743461185","https://openalex.org/W2805905939"],"abstract_inverted_index":{"We":[0],"propose":[1],"a":[2,46,75,95],"fast":[3],"interposer":[4,15],"bus":[5,35],"router":[6,38,80,113],"that":[7,124],"observes":[8],"the":[9,19,33,53,59,64,72,87,120,133],"complex":[10],"design":[11],"rules":[12],"of":[13,29,42,74],"silicon":[14],"layers":[16,27],"and":[17,31,57,86,104,128],"optimizes":[18],"signal":[20,60,65,93],"integrity.":[21],"By":[22],"escaping":[23],"highly":[24],"integrated":[25],"physical":[26],"(PHYs)":[28],"chiplets":[30,127],"sharing":[32],"same":[34],"topology,":[36],"our":[37,79],"compactly":[39],"interconnects":[40],"thousands":[41],"bump":[43],"I/Os":[44],"within":[45],"short":[47],"timeframe.":[48],"In":[49],"addition,":[50],"we":[51],"secure":[52],"maximum":[54],"wire":[55],"pitch":[56],"guard":[58],"wires":[61],"to":[62,91],"optimize":[63],"integrity":[66],"in":[67,94],"high":[68],"bandwidth.":[69],"Compared":[70],"with":[71,99],"results":[73,88,118],"commercial":[76],"EDA":[77],"tool,":[78],"is":[81],"about":[82],"five":[83],"times":[84],"faster":[85],"are":[89],"verified":[90],"transmit":[92],"target":[96],"data":[97],"rate":[98],"30%":[100],"improved":[101,106],"eye":[102,107],"width":[103],"35%":[105],"height":[108],"for":[109,119],"industrial":[110],"designs.":[111],"Our":[112],"can":[114],"provide":[115],"practical":[116],"routing":[117],"upcoming":[121],"2.5D":[122],"ICs":[123],"have":[125],"more":[126],"require":[129],"higher":[130],"bandwidth":[131],"than":[132],"existing":[134],"chips.":[135]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
