{"id":"https://openalex.org/W4391183758","doi":"https://doi.org/10.1109/asicon58565.2023.10396658","title":"Coupled Data Prefetch and Cache Partitioning Scheme for CPU-Accelerator System","display_name":"Coupled Data Prefetch and Cache Partitioning Scheme for CPU-Accelerator System","publication_year":2023,"publication_date":"2023-10-24","ids":{"openalex":"https://openalex.org/W4391183758","doi":"https://doi.org/10.1109/asicon58565.2023.10396658"},"language":"en","primary_location":{"id":"doi:10.1109/asicon58565.2023.10396658","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon58565.2023.10396658","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 15th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5104233809","display_name":"Zengshi Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zengshi Wang","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China","State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102964916","display_name":"Chao Fu","orcid":"https://orcid.org/0000-0001-9286-0275"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chao Fu","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China","State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066674438","display_name":"Jun Han","orcid":"https://orcid.org/0000-0002-5245-0754"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jun Han","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China","State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5104233809"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.3076,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55464824,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/instruction-prefetch","display_name":"Instruction prefetch","score":0.9579492807388306},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8233286142349243},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7222217917442322},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6555039882659912},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5376999974250793},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5364053845405579},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4931277930736542},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38780081272125244},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.32747882604599}],"concepts":[{"id":"https://openalex.org/C133588205","wikidata":"https://www.wikidata.org/wiki/Q28455645","display_name":"Instruction prefetch","level":3,"score":0.9579492807388306},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8233286142349243},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7222217917442322},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6555039882659912},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5376999974250793},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5364053845405579},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4931277930736542},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38780081272125244},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.32747882604599},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon58565.2023.10396658","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon58565.2023.10396658","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 15th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W2123700830","https://openalex.org/W2143773524","https://openalex.org/W2147657366","https://openalex.org/W2762155252","https://openalex.org/W2795232275","https://openalex.org/W2796645376","https://openalex.org/W2930718998","https://openalex.org/W3011338798","https://openalex.org/W3106090013","https://openalex.org/W3203530736","https://openalex.org/W4230706651","https://openalex.org/W4249553981"],"related_works":["https://openalex.org/W2167639078","https://openalex.org/W2379283503","https://openalex.org/W2462146500","https://openalex.org/W2141676084","https://openalex.org/W4247641071","https://openalex.org/W2406366721","https://openalex.org/W2166340998","https://openalex.org/W2914627172","https://openalex.org/W2167303720","https://openalex.org/W1544044631"],"abstract_inverted_index":{"An":[0],"increasing":[1],"interest":[2],"in":[3,6,63,87,115],"accelerators":[4,33,72],"occurs":[5],"recent":[7],"years":[8],"due":[9],"to":[10,58],"the":[11,21,27,51,60,68,79,96],"demand":[12],"for":[13,29,92],"high":[14],"performance":[15,69],"and":[16,34,54,66,73,104,110],"power":[17],"efficient":[18],"computing.":[19],"However,":[20],"potential":[22],"negative":[23],"effects":[24],"resulting":[25],"from":[26],"competition":[28],"hardware":[30],"resources":[31],"between":[32],"CPUs":[35],"have":[36],"not":[37],"been":[38],"well":[39],"investigated.":[40],"In":[41],"this":[42],"paper":[43],"we":[44],"introduce":[45],"DPCP,":[46],"a":[47,112],"scheme":[48,81],"that":[49,78],"combines":[50],"data":[52,56,61,99],"prefetching":[53,100],"static":[55],"partitioning":[57,106],"reduce":[59],"interference":[62],"shared":[64],"cache":[65,105],"improve":[67],"of":[70,98],"both":[71],"CPUs.":[74],"Our":[75],"research":[76],"demonstrates":[77],"DPCP":[80],"delivers":[82],"an":[83],"average":[84],"11%":[85],"improvement":[86],"IPC":[88],"(Instructions":[89],"Per":[90],"Cycle)":[91],"non-accelerated":[93],"tasks,":[94],"surpassing":[95],"gains":[97],"alone":[101,107],"by":[102,108],"10%":[103],"3%,":[109],"achieves":[111],"13%":[113],"increase":[114],"accelerator":[116],"speedup.":[117]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}