{"id":"https://openalex.org/W4391183542","doi":"https://doi.org/10.1109/asicon58565.2023.10396442","title":"Finding All Solutions of Multi-terminal Numberlink Problem Utilizing Top-down ZDD Construction","display_name":"Finding All Solutions of Multi-terminal Numberlink Problem Utilizing Top-down ZDD Construction","publication_year":2023,"publication_date":"2023-10-24","ids":{"openalex":"https://openalex.org/W4391183542","doi":"https://doi.org/10.1109/asicon58565.2023.10396442"},"language":"en","primary_location":{"id":"doi:10.1109/asicon58565.2023.10396442","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/asicon58565.2023.10396442","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 15th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024218979","display_name":"Xuanqi Li","orcid":null},"institutions":[{"id":"https://openalex.org/I135768898","display_name":"Ritsumeikan University","ror":"https://ror.org/0197nmd03","country_code":"JP","type":"education","lineage":["https://openalex.org/I135768898","https://openalex.org/I4390039241"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Xuanqi Li","raw_affiliation_strings":["Ritsumeikan University,Graduate School of Information Science and Engineering,Kusatsu,Japan","Graduate School of Information Science and Engineering, Ritsumeikan University, Kusatsu, Japan"],"affiliations":[{"raw_affiliation_string":"Ritsumeikan University,Graduate School of Information Science and Engineering,Kusatsu,Japan","institution_ids":["https://openalex.org/I135768898"]},{"raw_affiliation_string":"Graduate School of Information Science and Engineering, Ritsumeikan University, Kusatsu, Japan","institution_ids":["https://openalex.org/I135768898"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065420215","display_name":"Takashi Imagawa","orcid":"https://orcid.org/0000-0002-1131-0800"},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takashi Imagawa","raw_affiliation_strings":["Meiji University,School of Science and Technology,Kawasaki,Japan","School of Science and Technology, Meiji University, Kawasaki, Japan"],"affiliations":[{"raw_affiliation_string":"Meiji University,School of Science and Technology,Kawasaki,Japan","institution_ids":["https://openalex.org/I16656306"]},{"raw_affiliation_string":"School of Science and Technology, Meiji University, Kawasaki, Japan","institution_ids":["https://openalex.org/I16656306"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074384306","display_name":"Hiroyuki Ochi","orcid":"https://orcid.org/0000-0002-9075-6711"},"institutions":[{"id":"https://openalex.org/I135768898","display_name":"Ritsumeikan University","ror":"https://ror.org/0197nmd03","country_code":"JP","type":"education","lineage":["https://openalex.org/I135768898","https://openalex.org/I4390039241"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Ochi","raw_affiliation_strings":["Ritsumeikan University,College of Information Science and Engineering,Kusatsu,Japan","College of Information Science and Engineering, Ritsumeikan University, Kusatsu, Japan"],"affiliations":[{"raw_affiliation_string":"Ritsumeikan University,College of Information Science and Engineering,Kusatsu,Japan","institution_ids":["https://openalex.org/I135768898"]},{"raw_affiliation_string":"College of Information Science and Engineering, Ritsumeikan University, Kusatsu, Japan","institution_ids":["https://openalex.org/I135768898"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5024218979"],"corresponding_institution_ids":["https://openalex.org/I135768898"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18339123,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/terminal","display_name":"Terminal (telecommunication)","score":0.7690582275390625},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.611468493938446},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2162909209728241}],"concepts":[{"id":"https://openalex.org/C2779664074","wikidata":"https://www.wikidata.org/wiki/Q3518405","display_name":"Terminal (telecommunication)","level":2,"score":0.7690582275390625},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.611468493938446},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2162909209728241}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon58565.2023.10396442","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/asicon58565.2023.10396442","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 15th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1975335740","https://openalex.org/W2022695169","https://openalex.org/W2098047532","https://openalex.org/W2104530622","https://openalex.org/W4232904085"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W3211557223","https://openalex.org/W2007036916","https://openalex.org/W2120266540","https://openalex.org/W3015807911","https://openalex.org/W872563264","https://openalex.org/W2164087676","https://openalex.org/W4240867999","https://openalex.org/W2416728927","https://openalex.org/W4206528302"],"abstract_inverted_index":{"This":[0,89],"paper":[1,90],"defines":[2],"Multi-terminal":[3,97],"Numberlink":[4,23,60,98],"as":[5],"an":[6,26,92],"extended":[7,93],"problem":[8,28],"of":[9,35,59],"conventional":[10],"(two-terminal)":[11],"Number-link":[12],"and":[13,29,37],"presents":[14],"a":[15,32],"novel":[16],"algorithm":[17,65,95],"to":[18,44,55,68,86,103],"enumerate":[19,56],"all":[20,57],"solutions.":[21],"Since":[22],"is":[24,66,80],"theoretically":[25],"NP-complete":[27],"practically":[30],"mimics":[31],"planer":[33],"routing":[34],"VLSI":[36],"PCB,":[38],"various":[39],"algorithms":[40],"have":[41],"been":[42],"developed":[43],"solve":[45],"it.":[46],"The":[47],"existing":[48],"top-down":[49],"ZDD":[50],"construction":[51],"method":[52],"enables":[53],"us":[54],"solutions":[58],"efficiently.":[61],"However,":[62],"the":[63,69],"ZDD-based":[64,94],"tailored":[67],"Numberlink's":[70],"properties":[71],"that":[72,99],"each":[73],"net":[74],"has":[75],"exactly":[76],"two":[77],"terminals,":[78],"which":[79],"not":[81],"realistic":[82],"in":[83],"practical":[84],"circuits":[85],"be":[87,104],"routed.":[88,105],"proposes":[91],"for":[96],"allows":[100],"multi-fanout":[101],"nets":[102]},"counts_by_year":[],"updated_date":"2025-12-22T23:10:17.713674","created_date":"2025-10-10T00:00:00"}