{"id":"https://openalex.org/W4391183756","doi":"https://doi.org/10.1109/asicon58565.2023.10396257","title":"A 300MS/s 57.6dB SNDR Single-Channel SAR ADC with Accelerated SAR Logic","display_name":"A 300MS/s 57.6dB SNDR Single-Channel SAR ADC with Accelerated SAR Logic","publication_year":2023,"publication_date":"2023-10-24","ids":{"openalex":"https://openalex.org/W4391183756","doi":"https://doi.org/10.1109/asicon58565.2023.10396257"},"language":"en","primary_location":{"id":"doi:10.1109/asicon58565.2023.10396257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon58565.2023.10396257","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 15th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111117789","display_name":"Muxi Zou","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Muxi Zou","raw_affiliation_strings":["Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063433812","display_name":"Shunli Ma","orcid":"https://orcid.org/0000-0002-2737-9845"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shunli Ma","raw_affiliation_strings":["Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102543676","display_name":"Xiaodi Feng","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaodi Feng","raw_affiliation_strings":["Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016448886","display_name":"Junyan Ren","orcid":"https://orcid.org/0000-0002-7799-6251"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junyan Ren","raw_affiliation_strings":["Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001335523","display_name":"Tianxiang Wu","orcid":"https://orcid.org/0000-0003-4920-9932"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tianxiang Wu","raw_affiliation_strings":["Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State key Laboratory of Integrated Chips and Systems,Shanghai,China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5111117789"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18690403,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.681415855884552},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5106387734413147},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.4889039099216461},{"id":"https://openalex.org/keywords/synthetic-aperture-radar","display_name":"Synthetic aperture radar","score":0.46361619234085083},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43749046325683594},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27926862239837646},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23029100894927979},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.18035918474197388},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17815521359443665},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12303945422172546},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.11804050207138062}],"concepts":[{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.681415855884552},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5106387734413147},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.4889039099216461},{"id":"https://openalex.org/C87360688","wikidata":"https://www.wikidata.org/wiki/Q740686","display_name":"Synthetic aperture radar","level":2,"score":0.46361619234085083},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43749046325683594},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27926862239837646},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23029100894927979},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.18035918474197388},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17815521359443665},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12303945422172546},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.11804050207138062}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon58565.2023.10396257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon58565.2023.10396257","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 15th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6600000262260437}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309612","display_name":"Natural Science Foundation of Shanghai","ror":null},{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1806621776","https://openalex.org/W2099432139","https://openalex.org/W2100749576","https://openalex.org/W2164251692","https://openalex.org/W2564345649","https://openalex.org/W2788013190","https://openalex.org/W2908863539"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2759986866","https://openalex.org/W2382290278","https://openalex.org/W3205077634","https://openalex.org/W2090966292","https://openalex.org/W4390993506"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"10":[4],"bit":[5],"300MS/s":[6],"single":[7],"channel":[8],"asynchronous":[9],"successive":[10],"approximation":[11],"register":[12],"(SAR)":[13],"analog-to-digital":[14],"converter":[15,40],"(ADC)":[16],"implemented":[17],"in":[18,48,69],"28nm":[19,50],"CMOS":[20],"technology.":[21,51],"The":[22,44],"improved":[23],"SAR":[24],"logic":[25,28],"shortens":[26],"the":[27,37],"path":[29],"delay":[30],"and":[31,58,63],"leads":[32],"more":[33],"settling":[34],"time":[35],"for":[36],"capacitive":[38],"digital-to-analog":[39],"(CDAC)":[41],"capacitor":[42],"rollover.":[43],"ADC":[45],"is":[46],"designed":[47],"TSMC":[49],"It":[52],"achieves":[53],"SNDR/SFDR":[54],"of":[55,71,74],"58.80":[56],"dB/81.9dB":[57],"57.6":[59],"dB/79.0dB":[60],"at":[61],"low":[62],"Nyquist":[64],"input":[65],"frequency,":[66],"respectively,":[67],"resulting":[68],"figure":[70],"merit":[72],"(FoM)":[73],"11.3":[75],"fJ/conversion-step.":[76]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
