{"id":"https://openalex.org/W4200406800","doi":"https://doi.org/10.1109/asicon52560.2021.9620498","title":"Effects of using Multi Voltage Threshold Transistors in Asynchronous Circuits","display_name":"Effects of using Multi Voltage Threshold Transistors in Asynchronous Circuits","publication_year":2021,"publication_date":"2021-10-26","ids":{"openalex":"https://openalex.org/W4200406800","doi":"https://doi.org/10.1109/asicon52560.2021.9620498"},"language":"en","primary_location":{"id":"doi:10.1109/asicon52560.2021.9620498","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon52560.2021.9620498","pdf_url":null,"source":{"id":"https://openalex.org/S4363607945","display_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062207507","display_name":"Shahzad Haider","orcid":null},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shahzad Haider","raw_affiliation_strings":["School of Microelectronics, University of Science and Technology of China, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, University of Science and Technology of China, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100423614","display_name":"Song Chen","orcid":"https://orcid.org/0000-0003-0341-3428"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Song Chen","raw_affiliation_strings":["School of Microelectronics, University of Science and Technology of China, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, University of Science and Technology of China, China","institution_ids":["https://openalex.org/I126520041"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126520041"],"apc_list":null,"apc_paid":null,"fwci":0.814,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.68773547,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8032166361808777},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.66789710521698},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.6350951194763184},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6070452332496643},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5762304067611694},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4976394474506378},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4725610613822937},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.44602644443511963},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.43325212597846985},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16952186822891235},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.0915568470954895}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8032166361808777},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.66789710521698},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.6350951194763184},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6070452332496643},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5762304067611694},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4976394474506378},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4725610613822937},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.44602644443511963},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.43325212597846985},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16952186822891235},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0915568470954895}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon52560.2021.9620498","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon52560.2021.9620498","pdf_url":null,"source":{"id":"https://openalex.org/S4363607945","display_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1512610407","https://openalex.org/W1615203916","https://openalex.org/W1749584095","https://openalex.org/W1817545098","https://openalex.org/W1965379144","https://openalex.org/W1971352894","https://openalex.org/W1994690319","https://openalex.org/W2032463221","https://openalex.org/W2085583524","https://openalex.org/W2093491063","https://openalex.org/W2102014077","https://openalex.org/W2104105510","https://openalex.org/W2128748528","https://openalex.org/W2132067504","https://openalex.org/W2479948040","https://openalex.org/W2757371271"],"related_works":["https://openalex.org/W2116677773","https://openalex.org/W2155261584","https://openalex.org/W2584231425","https://openalex.org/W2150611273","https://openalex.org/W4207086172","https://openalex.org/W2042919702","https://openalex.org/W4225981436","https://openalex.org/W2156185805","https://openalex.org/W2770353918","https://openalex.org/W2588941787"],"abstract_inverted_index":{"Integrated":[0],"Latch":[1],"(IL)":[2],"based":[3,39],"Quasi-Delay-Insensitive":[4],"(QDI)":[5],"asynchronous":[6,40,69],"circuits":[7,41],"provides":[8],"power":[9,20,57,83],"and":[10,46,55,79],"performance":[11],"efficiency":[12],"for":[13],"large":[14],"scale":[15],"systems":[16],"but":[17],"increases":[18],"leakage":[19],"with":[21,71,86],"shrinking":[22],"size":[23],"in":[24,35],"deep-submicron.":[25],"This":[26],"paper":[27],"investigates":[28],"the":[29],"use":[30],"of":[31,65],"Multi-Voltage":[32,47],"Threshold":[33,48],"transistors":[34,49],"Sense":[36],"Amplifier":[37],"Half-Buffer":[38],"by":[42],"using":[43,73],"Logical":[44],"Effort":[45],"to":[50],"switch":[51],"critical":[52],"path":[53],"faster":[54,78],"reduce":[56],"consumption":[58],"on":[59],"noncritical":[60],"path.":[61],"The":[62],"simulation":[63],"results":[64],"custom":[66],"designed":[67,89],"buffer":[68],"cells":[70],"MVT":[72,91],"40nm":[74],"technology":[75],"performs":[76],"8%":[77],"consume":[80],"23%":[81],"less":[82],"when":[84],"compared":[85],"same":[87],"cell":[88],"without":[90],"transistors.":[92]},"counts_by_year":[{"year":2023,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
