{"id":"https://openalex.org/W4200325459","doi":"https://doi.org/10.1109/asicon52560.2021.9620344","title":"Design of Majority Logic Based 4-bit Approximate Subtractors and its Application in Divider","display_name":"Design of Majority Logic Based 4-bit Approximate Subtractors and its Application in Divider","publication_year":2021,"publication_date":"2021-10-26","ids":{"openalex":"https://openalex.org/W4200325459","doi":"https://doi.org/10.1109/asicon52560.2021.9620344"},"language":"en","primary_location":{"id":"doi:10.1109/asicon52560.2021.9620344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon52560.2021.9620344","pdf_url":null,"source":{"id":"https://openalex.org/S4363607945","display_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069783195","display_name":"Chuanhe Shang","orcid":null},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chuanhe Shang","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science (EECS), Ningbo University, Ningbo, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science (EECS), Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022156184","display_name":"Zhufei Chu","orcid":"https://orcid.org/0000-0001-5718-4822"},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhufei Chu","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science (EECS), Ningbo University, Ningbo, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science (EECS), Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I109935558"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"62","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6666051149368286},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6447040438652039},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5617198944091797},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.493618369102478},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.49236738681793213},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4727369546890259},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.4674912989139557},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.4366161823272705},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.41689562797546387},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4008462429046631},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36818915605545044},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36209535598754883},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.25029456615448},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16690149903297424},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1375412940979004}],"concepts":[{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6666051149368286},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6447040438652039},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5617198944091797},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.493618369102478},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.49236738681793213},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4727369546890259},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.4674912989139557},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.4366161823272705},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.41689562797546387},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4008462429046631},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36818915605545044},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36209535598754883},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.25029456615448},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16690149903297424},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1375412940979004},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon52560.2021.9620344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon52560.2021.9620344","pdf_url":null,"source":{"id":"https://openalex.org/S4363607945","display_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 14th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1976924286","https://openalex.org/W1998824039","https://openalex.org/W2096704803","https://openalex.org/W2111013824","https://openalex.org/W2460228185","https://openalex.org/W2609332101","https://openalex.org/W2757225496","https://openalex.org/W2914939965","https://openalex.org/W2982143065","https://openalex.org/W3048414096","https://openalex.org/W3081216677","https://openalex.org/W3086584843","https://openalex.org/W3107424270"],"related_works":["https://openalex.org/W1966764473","https://openalex.org/W1553855433","https://openalex.org/W1488117239","https://openalex.org/W2082788688","https://openalex.org/W2146588118","https://openalex.org/W3129977055","https://openalex.org/W1792381030","https://openalex.org/W2304188393","https://openalex.org/W2130825721","https://openalex.org/W2077400643"],"abstract_inverted_index":{"Approximate":[0],"computing":[1,5],"is":[2],"an":[3,74,108],"emerging":[4],"paradigm":[6],"that":[7],"enables":[8],"the":[9,17,26,32,52,59,63,84,91,99,110],"improvement":[10],"of":[11,19,22,31,101],"power,":[12],"performance,":[13],"and":[14,58,118],"area":[15],"with":[16,104,122],"relaxation":[18],"accuracy.":[20,106],"Lots":[21],"nanotechnologies":[23],"efficiently":[24],"realize":[25],"majority":[27,44,116],"logic":[28,35,54,102],"function":[29],"instead":[30],"traditional":[33],"AND/OR":[34],"operations.":[36],"In":[37],"this":[38],"paper,":[39],"we":[40],"propose":[41],"two":[42],"novel":[43],"logic-based":[45],"4-bit":[46],"approximate":[47,112],"subtractors":[48],"(MLASs),":[49],"one":[50,61],"for":[51,62],"accuracy-constrained":[53],"gate":[55],"optimization":[56],"(MLAS1)":[57],"other":[60],"best":[64],"logical":[65],"delay":[66],"(MLAS2).":[67],"The":[68,87],"proposed":[69,92],"designs":[70,93],"are":[71],"applied":[72],"in":[73,98],"8/4":[75],"unsigned":[76],"restoring":[77],"array":[78],"divider":[79,113],"which":[80],"adopts":[81],"MLASs":[82],"as":[83],"building":[85],"blocks.":[86],"experimental":[88],"results":[89],"indicate":[90],"have":[94],"a":[95,123],"significant":[96],"reduction":[97],"number":[100],"gates":[103,117],"similar":[105],"As":[107],"example,":[109],"MLAS1-based":[111],"saves":[114],"20%":[115],"15.4%":[119],"inverters":[120],"compared":[121],"state-of-the-art":[124],"design.":[125]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
