{"id":"https://openalex.org/W3004950063","doi":"https://doi.org/10.1109/asicon47005.2019.8983669","title":"Radiation Hardened Design of Pipeline and Register File in Processor","display_name":"Radiation Hardened Design of Pipeline and Register File in Processor","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W3004950063","doi":"https://doi.org/10.1109/asicon47005.2019.8983669","mag":"3004950063"},"language":"en","primary_location":{"id":"doi:10.1109/asicon47005.2019.8983669","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983669","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100651217","display_name":"Liyi Xiao","orcid":null},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Li-Yi Xiao","raw_affiliation_strings":["Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","Microelectronic Center, Harbin Institute of Technology, Harbin, China"],"affiliations":[{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","institution_ids":["https://openalex.org/I204983213"]},{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology, Harbin, China","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101528091","display_name":"Yuangang Wang","orcid":"https://orcid.org/0000-0002-2448-8851"},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuan-Gang Wang","raw_affiliation_strings":["Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","Microelectronic Center, Harbin Institute of Technology, Harbin, China"],"affiliations":[{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","institution_ids":["https://openalex.org/I204983213"]},{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology, Harbin, China","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010707349","display_name":"Zu-Qiang Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zu-Qiang Zhang","raw_affiliation_strings":["Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","Microelectronic Center, Harbin Institute of Technology, Harbin, China"],"affiliations":[{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","institution_ids":["https://openalex.org/I204983213"]},{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology, Harbin, China","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101981358","display_name":"Jiaqiang Li","orcid":"https://orcid.org/0000-0001-5163-1484"},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jia-Qiang Li","raw_affiliation_strings":["Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","Microelectronic Center, Harbin Institute of Technology, Harbin, China"],"affiliations":[{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","institution_ids":["https://openalex.org/I204983213"]},{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology, Harbin, China","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100743297","display_name":"Jie Li","orcid":"https://orcid.org/0000-0002-6175-3167"},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Li","raw_affiliation_strings":["Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","Microelectronic Center, Harbin Institute of Technology, Harbin, China"],"affiliations":[{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology,Harbin,China,150001","institution_ids":["https://openalex.org/I204983213"]},{"raw_affiliation_string":"Microelectronic Center, Harbin Institute of Technology, Harbin, China","institution_ids":["https://openalex.org/I204983213"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100651217"],"corresponding_institution_ids":["https://openalex.org/I204983213"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16281537,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9850999712944031,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9602000117301941,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.8956335783004761},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6818031072616577},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.6558597087860107},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.6384067535400391},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5972863435745239},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5494741797447205},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.5117592811584473},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.4790259897708893},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.464376837015152},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44563955068588257},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.41033047437667847},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.32687821984291077},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.28759077191352844},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.22057881951332092},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2112014889717102},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.15206357836723328},{"id":"https://openalex.org/keywords/memory-address","display_name":"Memory address","score":0.09697392582893372}],"concepts":[{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.8956335783004761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6818031072616577},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.6558597087860107},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.6384067535400391},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5972863435745239},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5494741797447205},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.5117592811584473},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.4790259897708893},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.464376837015152},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44563955068588257},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.41033047437667847},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.32687821984291077},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.28759077191352844},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.22057881951332092},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2112014889717102},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.15206357836723328},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.09697392582893372}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon47005.2019.8983669","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983669","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.699999988079071,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2011900848","https://openalex.org/W2031113490","https://openalex.org/W2165087208","https://openalex.org/W2269463501","https://openalex.org/W2443429837","https://openalex.org/W2792744653"],"related_works":["https://openalex.org/W58658798","https://openalex.org/W3114375939","https://openalex.org/W2224192221","https://openalex.org/W2797678940","https://openalex.org/W3008821054","https://openalex.org/W1482836228","https://openalex.org/W2356166161","https://openalex.org/W2014882201","https://openalex.org/W3144620029","https://openalex.org/W3004950063"],"abstract_inverted_index":{"With":[0],"the":[1,11,14,18,26,45,53,61,67,82,88,96,102,123,140,160,165],"development":[2],"of":[3,17,41,47],"aerospace":[4],"technology":[5],"and":[6,57,60,91,138,153,164],"integrated":[7],"circuit":[8],"(IC)":[9],"technology,":[10],"processor,":[12],"as":[13],"core":[15],"component":[16],"spacecraft":[19],"electronic":[20],"device,":[21],"is":[22,40],"highly":[23],"susceptible":[24],"to":[25,76],"space":[27],"high-energy":[28],"particle":[29],"radiation":[30,49],"that":[31,159],"can":[32,170],"generate":[33],"single":[34],"event":[35],"upset":[36],"(SEU),":[37],"Therefore,":[38],"it":[39],"great":[42],"significance":[43],"for":[44,101,116],"research":[46],"processor":[48,69],"hardened":[50,63],"design.":[51],"Considering":[52],"processor's":[54],"speed,":[55],"area":[56],"power":[58],"overhead":[59],"final":[62],"performance,":[64],"based":[65],"on":[66],"OR1200":[68],"platform,":[70],"this":[71,119],"paper":[72,120],"proposes":[73],"a":[74],"technique":[75],"protect":[77],"most":[78],"signals":[79,93],"by":[80,94,128],"using":[81,95,129],"interleaved":[83],"parity":[84],"codes":[85,132],"combined":[86],"with":[87,133,143],"pipeline":[89,103,163],"restart":[90],"partial":[92],"Triple":[97],"Modular":[98],"Redundancy":[99],"(TMR)":[100],"in":[104,126,162,167],"processor.":[105],"As":[106],"multiple":[107],"bits":[108],"upsets":[109],"(MBU)":[110],"have":[111],"become":[112],"an":[113,144],"serious":[114],"issue":[115],"memory":[117],"reliability,":[118],"also":[121],"protects":[122],"register":[124,141,168],"file":[125,142,169],"processer":[127],"error":[130],"correction":[131,137],"four":[134],"adjacent":[135],"errors":[136],"refreshing":[139],"exception":[145],"trigger.":[146],"Finally,":[147],"both":[148],"proposed":[149],"techniques":[150],"are":[151],"verified":[152],"evaluated":[154],"effectively.":[155],"The":[156],"result":[157],"indicates":[158],"SEU":[161],"MBU":[166],"be":[171],"effectively":[172],"mitigated.":[173]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}