{"id":"https://openalex.org/W3004981959","doi":"https://doi.org/10.1109/asicon47005.2019.8983617","title":"Power optimization for FPRM logic using approximate computing technique","display_name":"Power optimization for FPRM logic using approximate computing technique","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W3004981959","doi":"https://doi.org/10.1109/asicon47005.2019.8983617","mag":"3004981959"},"language":"en","primary_location":{"id":"doi:10.1109/asicon47005.2019.8983617","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983617","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050831116","display_name":"Yichen Wang","orcid":"https://orcid.org/0000-0002-4844-9427"},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yichen Wang","raw_affiliation_strings":["Faculty of Electrical Engineering & Computer Science, Ningbo University,Ningbo,China,315211","Faculty of Electrical Engineering & Computer Science, Ningbo University, Ningbo, China"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering & Computer Science, Ningbo University,Ningbo,China,315211","institution_ids":["https://openalex.org/I109935558"]},{"raw_affiliation_string":"Faculty of Electrical Engineering & Computer Science, Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037201336","display_name":"Lunyao Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lunyao Wang","raw_affiliation_strings":["Faculty of Electrical Engineering & Computer Science, Ningbo University,Ningbo,China,315211","Faculty of Electrical Engineering & Computer Science, Ningbo University, Ningbo, China"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering & Computer Science, Ningbo University,Ningbo,China,315211","institution_ids":["https://openalex.org/I109935558"]},{"raw_affiliation_string":"Faculty of Electrical Engineering & Computer Science, Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5050831116"],"corresponding_institution_ids":["https://openalex.org/I109935558"],"apc_list":null,"apc_paid":null,"fwci":0.2408,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.53678581,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6336196660995483},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5966142416000366},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.545157790184021},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5299989581108093},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5059568285942078},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5038949847221375},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.478347510099411},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.44946956634521484},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.41280800104141235},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.4112928509712219},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.353506863117218},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09178170561790466}],"concepts":[{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6336196660995483},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5966142416000366},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.545157790184021},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5299989581108093},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5059568285942078},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5038949847221375},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.478347510099411},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44946956634521484},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.41280800104141235},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.4112928509712219},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.353506863117218},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09178170561790466},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon47005.2019.8983617","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983617","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2012883479","https://openalex.org/W2046610859","https://openalex.org/W2063203247","https://openalex.org/W2106360508","https://openalex.org/W2401611945","https://openalex.org/W2477896399","https://openalex.org/W4245558464"],"related_works":["https://openalex.org/W2955629470","https://openalex.org/W2783627200","https://openalex.org/W3110056702","https://openalex.org/W3004519191","https://openalex.org/W2798972211","https://openalex.org/W2141444266","https://openalex.org/W2610740845","https://openalex.org/W2477896399","https://openalex.org/W2129300245","https://openalex.org/W2541593246","https://openalex.org/W2080922340","https://openalex.org/W2374936135","https://openalex.org/W2944400671","https://openalex.org/W2549378499","https://openalex.org/W2107072852","https://openalex.org/W2382088768","https://openalex.org/W2158394146","https://openalex.org/W2386895400","https://openalex.org/W2343773422","https://openalex.org/W1587676517"],"abstract_inverted_index":{"A":[0],"power":[1,22,38,69,96],"optimization":[2,39],"algorithm":[3,16,34,73],"based":[4,25],"on":[5,26],"approximate":[6,90],"computing":[7,91],"technique":[8],"was":[9],"proposed":[10,72],"for":[11,35,48],"FPRM":[12,18],"logic":[13,19,37,50],"circuits.":[14],"The":[15,71],"includes":[17],"circuits":[20],"dynamic":[21,95],"estimation":[23],"model":[24],"signal":[27],"probability":[28],"and":[29,43,78],"transition":[30],"density,":[31],"a":[32],"genetic":[33],"RM":[36,49],"using":[40,51,88],"polarity":[41],"searching":[42],"error":[44],"rate":[45],"(ER)":[46],"calculation":[47],"double":[52],"sharp":[53],"product":[54,62],"operation.":[55],"Under":[56],"the":[57,89,93,103],"constraint":[58],"of":[59,106],"ER,":[60],"some":[61],"terms":[63],"are":[64],"selectively":[65],"deleted":[66],"to":[67],"reduce":[68],"consumption.":[70],"is":[74],"implemented":[75],"in":[76],"C":[77],"tested":[79],"under":[80],"MCNC":[81],"benchmarks.":[82],"Experimental":[83],"results":[84],"show":[85],"that":[86],"by":[87,100],"technique,":[92],"average":[94,104],"can":[97],"be":[98],"reduced":[99],"22.77%":[101],"with":[102],"ER":[105],"3.21%.":[107]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}