{"id":"https://openalex.org/W3004680451","doi":"https://doi.org/10.1109/asicon47005.2019.8983610","title":"A Fast Signal Integrity Design Model of Printed Circuit Board based on Monte-Carlo Tree","display_name":"A Fast Signal Integrity Design Model of Printed Circuit Board based on Monte-Carlo Tree","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W3004680451","doi":"https://doi.org/10.1109/asicon47005.2019.8983610","mag":"3004680451"},"language":"en","primary_location":{"id":"doi:10.1109/asicon47005.2019.8983610","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983610","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009381590","display_name":"Tingrui Zhang","orcid":"https://orcid.org/0000-0001-5740-4960"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tingrui Zhang","raw_affiliation_strings":["University of Electronic Science and Technology of China,Chengdu,611731","University of Electronic Science and Technology of China, Chengdu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Electronic Science and Technology of China,Chengdu,611731","institution_ids":["https://openalex.org/I150229711"]},{"raw_affiliation_string":"University of Electronic Science and Technology of China, Chengdu","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100325186","display_name":"Siyu Chen","orcid":"https://orcid.org/0000-0002-8784-1341"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Siyu Chen","raw_affiliation_strings":["University of Electronic Science and Technology of China,Chengdu,611731","University of Electronic Science and Technology of China, Chengdu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Electronic Science and Technology of China,Chengdu,611731","institution_ids":["https://openalex.org/I150229711"]},{"raw_affiliation_string":"University of Electronic Science and Technology of China, Chengdu","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004166302","display_name":"Shuwu Wei","orcid":null},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuwu Wei","raw_affiliation_strings":["University of Electronic Science and Technology of China,Chengdu,611731","University of Electronic Science and Technology of China, Chengdu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Electronic Science and Technology of China,Chengdu,611731","institution_ids":["https://openalex.org/I150229711"]},{"raw_affiliation_string":"University of Electronic Science and Technology of China, Chengdu","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078286204","display_name":"Jienan Chen","orcid":"https://orcid.org/0000-0003-1265-0775"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jienan Chen","raw_affiliation_strings":["University of Electronic Science and Technology of China,Chengdu,611731","University of Electronic Science and Technology of China, Chengdu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Electronic Science and Technology of China,Chengdu,611731","institution_ids":["https://openalex.org/I150229711"]},{"raw_affiliation_string":"University of Electronic Science and Technology of China, Chengdu","institution_ids":["https://openalex.org/I150229711"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I150229711"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9898999929428101,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9898999929428101,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12111","display_name":"Industrial Vision Systems and Defect Detection","score":0.9821000099182129,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9807000160217285,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.8555301427841187},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.7926753759384155},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.7687206268310547},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6795225143432617},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.6125133633613586},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.5672000050544739},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.525395929813385},{"id":"https://openalex.org/keywords/monte-carlo-tree-search","display_name":"Monte Carlo tree search","score":0.4900602102279663},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.39143842458724976},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11603432893753052},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.07648360729217529}],"concepts":[{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.8555301427841187},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.7926753759384155},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.7687206268310547},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6795225143432617},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.6125133633613586},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.5672000050544739},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.525395929813385},{"id":"https://openalex.org/C46149586","wikidata":"https://www.wikidata.org/wiki/Q11785332","display_name":"Monte Carlo tree search","level":3,"score":0.4900602102279663},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.39143842458724976},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11603432893753052},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.07648360729217529},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon47005.2019.8983610","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983610","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1511623646","https://openalex.org/W1985854882","https://openalex.org/W1989826251","https://openalex.org/W2027412142","https://openalex.org/W2045273402","https://openalex.org/W2097563903","https://openalex.org/W2116712079","https://openalex.org/W2117766083","https://openalex.org/W2542885387","https://openalex.org/W2604596780","https://openalex.org/W2782731083","https://openalex.org/W2901566369","https://openalex.org/W2902693823","https://openalex.org/W2952429944","https://openalex.org/W2965410099","https://openalex.org/W6657096683","https://openalex.org/W6677529380"],"related_works":["https://openalex.org/W2289987414","https://openalex.org/W2386114299","https://openalex.org/W27383583","https://openalex.org/W2364371960","https://openalex.org/W2537540583","https://openalex.org/W1582212326","https://openalex.org/W948881177","https://openalex.org/W3211049872","https://openalex.org/W2156032803","https://openalex.org/W4206920939"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"discuss":[4],"the":[5,9,33,41,44,55,64,76,80,99,122,129],"signal":[6,34,85],"integrity":[7,35],"of":[8,19,32,82],"printed":[10],"circuit":[11],"board(PCB)":[12],"and":[13,30,38,53,70,78],"put":[14],"forward":[15],"a":[16,84,110],"new":[17],"method":[18,100],"designing":[20,83],"PCB":[21,65,87],"parameters":[22,51,97],"based":[23],"on":[24,47,75],"monte-carlo":[25],"tree":[26],"search(MCTS).":[27],"First,":[28],"effects":[29],"measurements":[31],"are":[36],"analysed":[37],"presented.":[39],"Next,":[40],"paper":[42],"introduces":[43],"algorithm":[45,60],"MCTS":[46],"how":[48],"to":[49,63,92,127],"conduct":[50],"assignments":[52],"presents":[54],"improved":[56],"upper":[57],"confidence":[58],"bound(UCB)":[59],"that":[61],"adapts":[62],"parameter":[66],"design.":[67],"We":[68],"simulate":[69],"collect":[71],"eye":[72],"metrics":[73],"data":[74],"software":[77],"accelerate":[79],"process":[81],"integrated":[86],"by":[88],"employing":[89],"MCTS.":[90],"Compared":[91],"randomly":[93],"searching":[94],"for":[95],"optimal":[96,103],"combination,":[98],"generates":[101],"an":[102],"global":[104],"consequence":[105],"rather":[106],"than":[107],"working":[108],"out":[109],"suboptimum":[111],"result.":[112,130],"The":[113],"total":[114],"time":[115],"cost":[116],"is":[117],"within":[118],"ten":[119],"minutes,":[120],"while":[121],"random":[123],"search":[124],"takes":[125],"hours":[126],"get":[128]},"counts_by_year":[{"year":2023,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
