{"id":"https://openalex.org/W3004633370","doi":"https://doi.org/10.1109/asicon47005.2019.8983576","title":"A Implementation for Built-in Self-Testing of RapidIO by JTAG","display_name":"A Implementation for Built-in Self-Testing of RapidIO by JTAG","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W3004633370","doi":"https://doi.org/10.1109/asicon47005.2019.8983576","mag":"3004633370"},"language":"en","primary_location":{"id":"doi:10.1109/asicon47005.2019.8983576","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110370501","display_name":"Chunmei Hu","orcid":null},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Hu Chunmei","raw_affiliation_strings":["School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","School of Computer, National University of Defense Technology, Changsha, P.R. China"],"affiliations":[{"raw_affiliation_string":"School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"School of Computer, National University of Defense Technology, Changsha, P.R. China","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Zhang Zhenyang","orcid":null},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhang Zhenyang","raw_affiliation_strings":["School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","School of Computer, National University of Defense Technology, Changsha, P.R. China"],"affiliations":[{"raw_affiliation_string":"School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"School of Computer, National University of Defense Technology, Changsha, P.R. China","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Guo Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guo Yang","raw_affiliation_strings":["School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","School of Computer, National University of Defense Technology, Changsha, P.R. China"],"affiliations":[{"raw_affiliation_string":"School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"School of Computer, National University of Defense Technology, Changsha, P.R. China","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075182845","display_name":"Xu Jingyanan","orcid":null},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xu Jingyanan","raw_affiliation_strings":["School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","School of Computer, National University of Defense Technology, Changsha, P.R. China"],"affiliations":[{"raw_affiliation_string":"School of Computer, National University of Defense Technology,Changsha,P.R. China,410073","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"School of Computer, National University of Defense Technology, Changsha, P.R. China","institution_ids":["https://openalex.org/I170215575"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5110370501"],"corresponding_institution_ids":["https://openalex.org/I170215575"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20162005,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6601300239562988},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6534295082092285},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.615218997001648},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5544770359992981},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4696979522705078},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.44084206223487854},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4255903363227844},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40024882555007935},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21365728974342346},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15786361694335938},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.11161679029464722},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09881019592285156}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6601300239562988},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6534295082092285},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.615218997001648},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5544770359992981},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4696979522705078},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44084206223487854},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4255903363227844},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40024882555007935},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21365728974342346},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15786361694335938},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.11161679029464722},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09881019592285156},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon47005.2019.8983576","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2378005410","https://openalex.org/W2170435352","https://openalex.org/W2048876619","https://openalex.org/W2142462517","https://openalex.org/W1570606890","https://openalex.org/W1979131826","https://openalex.org/W2370066713","https://openalex.org/W1984979050","https://openalex.org/W2978161533","https://openalex.org/W2379338802"],"abstract_inverted_index":{"With":[0],"the":[1,8,45,61,80,91,99,106,117,124,131,134,146,171],"development":[2],"of":[3,11,30,48,63,108,119,126,148,173],"integrated":[4],"circuit":[5,14,24],"manufacturing":[6],"process,":[7],"transmission":[9],"rate":[10],"high-speed":[12,32,54],"interface":[13,19,55],"is":[15,37,154],"rapidly":[16],"increasing.":[17],"High-speed":[18],"develops":[20],"from":[21,129],"traditional":[22,81],"digital":[23],"to":[25,86],"mixed-signal":[26],"circuit.":[27],"The":[28],"testing":[29,90],"mixed-mode":[31],"circuits":[33],"in":[34,51,102,170],"mass":[35,174],"production":[36,175],"difficult,":[38],"time-consuming":[39],"and":[40,59,66,74,89,111,123,166],"costly.":[41],"This":[42],"paper":[43,104],"realizes":[44],"testability":[46],"design":[47,100],"built-in":[49],"self-test(BIST)":[50],"a":[52,94],"typical":[53],"circuit--RapidIO":[56],"through":[57,150],"JTAG,":[58],"completes":[60],"verification":[62],"internal":[64],"loop":[65,68],"external":[67],"tests":[69],"both":[70],"on":[71,152],"simulation":[72],"phase":[73,172],"product":[75,92],"test":[76,164,167],"phase.":[77],"Comparing":[78],"with":[79,93],"method":[82,101],"using":[83],"core":[84],"program":[85,128],"access":[87],"RapidIO":[88,138],"bit":[95],"error":[96],"ratio":[97],"tester,":[98],"this":[103],"has":[105,162],"advantage":[107],"operating":[109],"simply":[110],"implementing":[112],"easily.":[113],"It":[114,161],"completely":[115],"saves":[116],"time":[118,125,136,165],"main":[120],"PLL's":[121],"locking":[122],"loading":[127],"outside":[130],"chip.":[132],"And":[133],"configuration":[135,149],"for":[137],"can":[139],"be":[140],"saved":[141],"by":[142],"one-thirds.":[143],"What's":[144],"more,":[145],"reliability":[147],"JTAG":[151],"ATE":[153],"more":[155],"guaranteed":[156],"than":[157],"running":[158],"function":[159],"program.":[160],"reduced":[163],"cost":[168],"effectively":[169],"test.":[176]},"counts_by_year":[],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}