{"id":"https://openalex.org/W3004940669","doi":"https://doi.org/10.1109/asicon47005.2019.8983532","title":"Configurable Hybrid Output Driver for GPIO with Wide Supply Voltage Range of 1.05V-3.70V","display_name":"Configurable Hybrid Output Driver for GPIO with Wide Supply Voltage Range of 1.05V-3.70V","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W3004940669","doi":"https://doi.org/10.1109/asicon47005.2019.8983532","mag":"3004940669"},"language":"en","primary_location":{"id":"doi:10.1109/asicon47005.2019.8983532","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983532","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069107784","display_name":"Siddharth Katare","orcid":null},"institutions":[{"id":"https://openalex.org/I76610242","display_name":"Cypress Semiconductor Corporation (Japan)","ror":"https://ror.org/0561ky130","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210127281","https://openalex.org/I76610242"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Siddharth Katare","raw_affiliation_strings":["Sankalp Semiconductor Pvt Ltd,Bangalore,India","Sankalp Semiconductor Pvt Ltd, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"Sankalp Semiconductor Pvt Ltd,Bangalore,India","institution_ids":["https://openalex.org/I76610242"]},{"raw_affiliation_string":"Sankalp Semiconductor Pvt Ltd, Bangalore, India","institution_ids":[]}]},{"author_position":"last","author":{"id":null,"display_name":"Nagaveni Subramanya","orcid":null},"institutions":[{"id":"https://openalex.org/I76610242","display_name":"Cypress Semiconductor Corporation (Japan)","ror":"https://ror.org/0561ky130","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210127281","https://openalex.org/I76610242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Nagaveni Subramanya","raw_affiliation_strings":["Sankalp Semiconductor Pvt Ltd,Bangalore,India","Sankalp Semiconductor Pvt Ltd, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"Sankalp Semiconductor Pvt Ltd,Bangalore,India","institution_ids":["https://openalex.org/I76610242"]},{"raw_affiliation_string":"Sankalp Semiconductor Pvt Ltd, Bangalore, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5069107784"],"corresponding_institution_ids":["https://openalex.org/I76610242"],"apc_list":null,"apc_paid":null,"fwci":0.121,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.50471961,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2019","issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.8627909421920776},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.682590663433075},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6222549080848694},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.5168807506561279},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4956928491592407},{"id":"https://openalex.org/keywords/cpu-core-voltage","display_name":"CPU core voltage","score":0.43898364901542664},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4268264174461365},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40633368492126465},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37251079082489014},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.3088594079017639},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2224489450454712},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19158899784088135},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.1151868999004364}],"concepts":[{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.8627909421920776},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.682590663433075},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6222549080848694},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.5168807506561279},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4956928491592407},{"id":"https://openalex.org/C55038917","wikidata":"https://www.wikidata.org/wiki/Q453979","display_name":"CPU core voltage","level":5,"score":0.43898364901542664},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4268264174461365},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40633368492126465},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37251079082489014},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.3088594079017639},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2224489450454712},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19158899784088135},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.1151868999004364},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/asicon47005.2019.8983532","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon47005.2019.8983532","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 13th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},{"id":"mag:3087669958","is_oa":false,"landing_page_url":"https://jglobal.jst.go.jp/en/detail?JGLOBAL_ID=202002250211446694","pdf_url":null,"source":{"id":"https://openalex.org/S4306512817","display_name":"IEEE Conference Proceedings","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":"IEEE Conference Proceedings","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1591537565","https://openalex.org/W2077950526","https://openalex.org/W2114496500","https://openalex.org/W2152196013","https://openalex.org/W2157363118"],"related_works":["https://openalex.org/W2910413339","https://openalex.org/W3116907634","https://openalex.org/W3117373474","https://openalex.org/W1565578855","https://openalex.org/W2735263506","https://openalex.org/W2743722923","https://openalex.org/W2914769588","https://openalex.org/W3036849301","https://openalex.org/W3146368118","https://openalex.org/W3157076093"],"abstract_inverted_index":{"The":[0,19,72],"GPIOs":[1],"with":[2],"a":[3,24,53,58],"wide":[4,25,59],"supply":[5,26,60],"voltage":[6,17,27,61],"range":[7,28,62],"support":[8,57],"help":[9],"in":[10,42,67,77],"interfacing":[11],"several":[12],"chips":[13],"operating":[14],"on":[15],"different":[16],"islands.":[18],"down":[20],"side":[21],"of":[22,33],"supporting":[23],"is":[29,75],"either":[30],"significant":[31,40],"increase":[32,41,66],"silicon":[34],"area":[35],"for":[36,45],"simpler":[37],"driver":[38,43],"or":[39],"complexity":[44,69],"optimized":[46],"area.":[47,71],"In":[48],"this":[49],"paper,":[50],"we":[51],"present":[52],"hybrid":[54],"approach":[55],"to":[56,84],"while":[63],"an":[64],"insignificant":[65],"design":[68],"and":[70,81],"proposed":[73],"circuit":[74],"designed":[76],"180nm":[78],"CMOS":[79],"process":[80],"supports":[82],"up":[83],"200MHz":[85],"transaction":[86],"speed":[87],"at":[88],"100pF":[89],"load.":[90]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}