{"id":"https://openalex.org/W2783218391","doi":"https://doi.org/10.1109/asicon.2017.8252584","title":"An input buffer for 12bit 2GS/s ADC","display_name":"An input buffer for 12bit 2GS/s ADC","publication_year":2017,"publication_date":"2017-10-01","ids":{"openalex":"https://openalex.org/W2783218391","doi":"https://doi.org/10.1109/asicon.2017.8252584","mag":"2783218391"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2017.8252584","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2017.8252584","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 12th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019175637","display_name":"Fubiao Cao","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fubiao Cao","raw_affiliation_strings":["State Key Laboratory of ASIC and System (Fudan University), Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System (Fudan University), Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101867100","display_name":"Yongzhen Chen","orcid":"https://orcid.org/0000-0002-1018-6289"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yongzhen Chen","raw_affiliation_strings":["State Key Laboratory of ASIC and System (Fudan University), Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System (Fudan University), Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047771900","display_name":"Zhiyuan Dai","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiyuan Dai","raw_affiliation_strings":["State Key Laboratory of ASIC and System (Fudan University), Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System (Fudan University), Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025053306","display_name":"Fan Ye","orcid":"https://orcid.org/0000-0002-1089-1498"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Ye","raw_affiliation_strings":["Department of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016448886","display_name":"Junyan Ren","orcid":"https://orcid.org/0000-0002-7799-6251"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junyan Ren","raw_affiliation_strings":["Department of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2625,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.5807169,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.8769229650497437},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.6395347118377686},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6348278522491455},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.6220903396606445},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.5974645614624023},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.5764337182044983},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5630063414573669},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5492609739303589},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4454383850097656},{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"Analog-to-digital converter","score":0.42496025562286377},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31223440170288086},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.24246808886528015},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17481738328933716},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13627609610557556},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07480692863464355}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.8769229650497437},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.6395347118377686},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6348278522491455},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.6220903396606445},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.5974645614624023},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.5764337182044983},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5630063414573669},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5492609739303589},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4454383850097656},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.42496025562286377},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31223440170288086},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.24246808886528015},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17481738328933716},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13627609610557556},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07480692863464355},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2017.8252584","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2017.8252584","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 12th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W2111708953","https://openalex.org/W4239486830"],"related_works":["https://openalex.org/W2953726986","https://openalex.org/W2137197505","https://openalex.org/W2005714378","https://openalex.org/W1515901614","https://openalex.org/W2944097897","https://openalex.org/W2098920926","https://openalex.org/W1510940175","https://openalex.org/W2911448950","https://openalex.org/W2078593221","https://openalex.org/W2186189745"],"abstract_inverted_index":{"An":[0],"input":[1,16,28,39,62,116],"buffer":[2,17,40,63],"using":[3,75],"in":[4,12,21,53,107,118],"2GS/s":[5],"12bit":[6],"resolution":[7],"analog-to-digital":[8],"converter(ADC)":[9],"is":[10,18,41,64,87],"presented":[11],"this":[13,58],"paper.":[14],"The":[15],"often":[19],"used":[20],"the":[22,27,32,38,44,48,54,67,83,90,93],"ADC":[23],"application":[24],"to":[25,42,81,97],"isolate":[26],"signal.":[29],"One":[30],"of":[31,37],"most":[33],"important":[34],"design":[35],"tasks":[36],"suppress":[43,82],"non-linearity":[45],"introduced":[46],"by":[47,74,89],"extracted":[49],"or":[50],"absorbed":[51],"current":[52],"sampling":[55,109],"circuits.":[56],"In":[57],"design,":[59],"a":[60],"wide-band":[61],"based":[65],"on":[66],"one-stage":[68],"source":[69],"follower":[70],"structure":[71],"and":[72,78,111],"improved":[73],"extra":[76,94],"capacitors":[77],"MOS":[79,95],"devices":[80,96],"non-linear":[84],"current.":[85],"It":[86,103],"supplied":[88],"LDOs":[91],"for":[92],"ensure":[98],"its":[99],"linear":[100],"dynamic":[101],"range.":[102],"consumes":[104],"70.1mW":[105],"power":[106],"2GHz":[108],"rate":[110],"68.14dB":[112],"SFDR":[113],"at":[114],"1GHz":[115],"frequency":[117],"post":[119],"simulation.":[120]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
