{"id":"https://openalex.org/W2782905655","doi":"https://doi.org/10.1109/asicon.2017.8252429","title":"A low-offset dynamic comparator with input offset-cancellation","display_name":"A low-offset dynamic comparator with input offset-cancellation","publication_year":2017,"publication_date":"2017-10-01","ids":{"openalex":"https://openalex.org/W2782905655","doi":"https://doi.org/10.1109/asicon.2017.8252429","mag":"2782905655"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2017.8252429","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2017.8252429","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 12th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051636209","display_name":"Ruihan Pei","orcid":"https://orcid.org/0000-0003-2092-190X"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruihan Pei","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100409741","display_name":"Jia Liu","orcid":"https://orcid.org/0000-0003-0383-0934"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jia Liu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101448567","display_name":"Xian Tang","orcid":"https://orcid.org/0000-0002-1361-7961"},"institutions":[{"id":"https://openalex.org/I3131625388","display_name":"University Town of Shenzhen","ror":"https://ror.org/05f5j6225","country_code":"CN","type":"education","lineage":["https://openalex.org/I3131625388"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xian Tang","raw_affiliation_strings":["Graduate School at Shenzhen, Tsinghua University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate School at Shenzhen, Tsinghua University, Shenzhen, China","institution_ids":["https://openalex.org/I3131625388","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084959547","display_name":"Fule Li","orcid":"https://orcid.org/0000-0002-7341-7240"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fule Li","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.29957128,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"132","last_page":"135"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8754845857620239},{"id":"https://openalex.org/keywords/preamplifier","display_name":"Preamplifier","score":0.8056583404541016},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.7953442335128784},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.6710909008979797},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.629568874835968},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47987714409828186},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.45963603258132935},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45568063855171204},{"id":"https://openalex.org/keywords/dc-bias","display_name":"DC bias","score":0.4221593737602234},{"id":"https://openalex.org/keywords/sigma","display_name":"Sigma","score":0.41407376527786255},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.36384156346321106},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2733413577079773},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26430439949035645},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.17348691821098328},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.1400785744190216}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8754845857620239},{"id":"https://openalex.org/C14245642","wikidata":"https://www.wikidata.org/wiki/Q399804","display_name":"Preamplifier","level":4,"score":0.8056583404541016},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.7953442335128784},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.6710909008979797},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.629568874835968},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47987714409828186},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45963603258132935},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45568063855171204},{"id":"https://openalex.org/C88682704","wikidata":"https://www.wikidata.org/wiki/Q2907415","display_name":"DC bias","level":3,"score":0.4221593737602234},{"id":"https://openalex.org/C2778049214","wikidata":"https://www.wikidata.org/wiki/Q7512234","display_name":"Sigma","level":2,"score":0.41407376527786255},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.36384156346321106},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2733413577079773},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26430439949035645},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.17348691821098328},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.1400785744190216},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2017.8252429","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2017.8252429","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 12th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6600000262260437}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1977030506","https://openalex.org/W1999067204","https://openalex.org/W2049107348","https://openalex.org/W2107423283","https://openalex.org/W2156231941","https://openalex.org/W2172010302"],"related_works":["https://openalex.org/W2390518854","https://openalex.org/W1554546639","https://openalex.org/W2377388014","https://openalex.org/W2371022287","https://openalex.org/W4389041029","https://openalex.org/W4291940500","https://openalex.org/W2070837678","https://openalex.org/W4306405609","https://openalex.org/W2123579933","https://openalex.org/W2123870544"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,15,111],"low-offset":[4],"dynamic":[5,16,23,36],"comparator":[6,17,61],"using":[7],"an":[8,69],"input":[9,29],"offset-cancellation":[10,30,87],"technique.":[11],"The":[12,25,44,73,105],"offset":[13,45,80,90,97],"of":[14,34,71],"is":[18,62,108],"mainly":[19],"determined":[20],"by":[21,64],"the":[22,32,35,96],"preamplifier.":[24],"proposed":[26],"technique":[27],"achieves":[28,78,88],"under":[31],"assistance":[33],"preamplifier":[37],"and":[38,52],"input-series":[39],"capacitors,":[40],"without":[41,86],"quiescent":[42],"current.":[43],"resulting":[46],"from":[47,110],"both":[48],"threshold":[49],"voltage":[50],"mismatch":[51,55],"sizing":[53],"factor":[54],"can":[56],"be":[57],"cancelled.":[58],"A":[59],"prototype":[60],"implemented":[63],"65-nm":[65],"CMOS":[66],"technology":[67],"with":[68],"area":[70],"127\u03bcm2.":[72],"simulation":[74],"results":[75],"show":[76],"it":[77],"1.16-mV":[79],"at":[81,91,98,114],"1-sigma(\u03c3),":[82],"while":[83],"its":[84],"counterpart":[85],"8.91-mV":[89],"1-sigma(\u03c3).":[92],"After":[93],"post-layout":[94],"simulation,":[95],"1-sigma(\u03c3)":[99],"only":[100],"slightly":[101],"increases":[102],"to":[103],"1.56-mV.":[104],"power":[106],"dissipation":[107],"135-\u03bcW":[109],"1.2V":[112],"supply,":[113],"500MHz":[115],"operating.":[116]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}