{"id":"https://openalex.org/W2499567274","doi":"https://doi.org/10.1109/asicon.2015.7517203","title":"An enhanced decoder for multiple-bit error correcting BCH codes","display_name":"An enhanced decoder for multiple-bit error correcting BCH codes","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2499567274","doi":"https://doi.org/10.1109/asicon.2015.7517203","mag":"2499567274"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7517203","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517203","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010254965","display_name":"Hupo Wei","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Hupo Wei","raw_affiliation_strings":["Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050097039","display_name":"Xiaole Cui","orcid":"https://orcid.org/0000-0002-3382-3703"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiaole Cui","raw_affiliation_strings":["Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100381999","display_name":"Qiang Zhang","orcid":"https://orcid.org/0000-0003-3776-9799"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Qiang Zhang","raw_affiliation_strings":["Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5104079377","display_name":"Yufeng Jin","orcid":"https://orcid.org/0009-0006-9750-4599"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yufeng Jin","raw_affiliation_strings":["Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key Lab of Integrated Microsystems, Graduate School, Shenzhen, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5010254965"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1973,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62464318,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"1","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bch-code","display_name":"BCH code","score":0.8388863801956177},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7587096691131592},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.5592449307441711},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5474657416343689},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5380475521087646},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.5362111330032349},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4801896810531616},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.42756152153015137},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.4243248701095581},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39864853024482727},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2902056872844696},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.27867528796195984},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09072738885879517}],"concepts":[{"id":"https://openalex.org/C42276685","wikidata":"https://www.wikidata.org/wiki/Q795705","display_name":"BCH code","level":3,"score":0.8388863801956177},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7587096691131592},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.5592449307441711},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5474657416343689},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5380475521087646},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.5362111330032349},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4801896810531616},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.42756152153015137},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.4243248701095581},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39864853024482727},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2902056872844696},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.27867528796195984},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09072738885879517},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7517203","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517203","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1564617507","https://openalex.org/W1593683169","https://openalex.org/W1952392627","https://openalex.org/W2095660925","https://openalex.org/W2101205270","https://openalex.org/W2103498248","https://openalex.org/W2137874240","https://openalex.org/W2138815251","https://openalex.org/W2139029296","https://openalex.org/W2155665756","https://openalex.org/W2942537621","https://openalex.org/W6640729338"],"related_works":["https://openalex.org/W1995527419","https://openalex.org/W1768316021","https://openalex.org/W1976834495","https://openalex.org/W4242597560","https://openalex.org/W2521769401","https://openalex.org/W1974357939","https://openalex.org/W3144457048","https://openalex.org/W3172524400","https://openalex.org/W406587413","https://openalex.org/W1723747798"],"abstract_inverted_index":{"With":[0],"the":[1,8,34,65,70,89,94,103,120,125,133],"advancement":[2],"of":[3,10,72],"device":[4],"technology":[5],"and":[6,22,51,56,84,97],"decreasing":[7],"gap":[9],"memory":[11,20],"cells,":[12,21],"radiation":[13],"particles":[14],"may":[15],"upset":[16],"more":[17],"multiple":[18,35],"adjacent":[19,63],"conventionally":[23],"used":[24],"BCH":[25,45,106],"code":[26,107],"in":[27,54,115],"SRAM":[28],"needs":[29],"an":[30],"improvement":[31],"to":[32,102],"correct":[33],"bit":[36],"soft":[37],"errors.":[38,73],"This":[39],"paper":[40],"proposes":[41],"a":[42,80],"novel":[43],"high-speed":[44],"decoder":[46,75,91,109,128],"that":[47,88],"corrects":[48,58,111],"triple-adjacent,":[49],"double-adjacent":[50],"single-bit":[52],"errors":[53,60,114],"parallel":[55,127],"serially":[57],"multiple-bit":[59],"other":[61],"than":[62,132],"errors,":[64],"syndrome":[66],"computation":[67],"depend":[68],"on":[69],"number":[71],"The":[74],"has":[76],"been":[77],"implemented":[78],"with":[79],"130nm":[81],"CMOS":[82],"technology,":[83],"experimental":[85],"results":[86],"show":[87],"proposed":[90,126],"incurs":[92],"almost":[93],"same":[95],"power":[96],"area":[98],"overhead":[99],"as":[100],"compared":[101],"conventional":[104],"TEC":[105],"serial":[108,134],"which":[110],"any":[112],"double-bit":[113],"serial.":[116],"What":[117],"is":[118,129],"more,":[119],"delay":[121],"overheads":[122],"incurred":[123],"by":[124],"50%":[130],"lower":[131],"decoder.":[135]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}