{"id":"https://openalex.org/W2479800435","doi":"https://doi.org/10.1109/asicon.2015.7517182","title":"Design of low-power FinFET-based TCAMs with unevenly-segmented matchlines for routing table applications","display_name":"Design of low-power FinFET-based TCAMs with unevenly-segmented matchlines for routing table applications","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2479800435","doi":"https://doi.org/10.1109/asicon.2015.7517182","mag":"2479800435"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7517182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517182","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102063487","display_name":"Meng\u2010Chou Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I70522481","display_name":"National Changhua University of Education","ror":"https://ror.org/005gkfa10","country_code":"TW","type":"education","lineage":["https://openalex.org/I70522481"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Meng-Chou Chang","raw_affiliation_strings":["Department of Electronic Engineering, National Changhua University of Education, Changhua, Taiwan, ROC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, National Changhua University of Education, Changhua, Taiwan, ROC","institution_ids":["https://openalex.org/I70522481"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012188793","display_name":"Kai-Lun He","orcid":null},"institutions":[{"id":"https://openalex.org/I70522481","display_name":"National Changhua University of Education","ror":"https://ror.org/005gkfa10","country_code":"TW","type":"education","lineage":["https://openalex.org/I70522481"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kai-Lun He","raw_affiliation_strings":["Department of Electronic Engineering, National Changhua University of Education, Changhua, Taiwan, ROC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, National Changhua University of Education, Changhua, Taiwan, ROC","institution_ids":["https://openalex.org/I70522481"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I70522481"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.21219226,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.7003906965255737},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6513282060623169},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6347708702087402},{"id":"https://openalex.org/keywords/content-addressable-memory","display_name":"Content-addressable memory","score":0.5590260624885559},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.5448293089866638},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5349423289299011},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4809205234050751},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4636496305465698},{"id":"https://openalex.org/keywords/routing-table","display_name":"Routing table","score":0.45730239152908325},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32455456256866455},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2305925488471985},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20798295736312866},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.17504918575286865},{"id":"https://openalex.org/keywords/routing-protocol","display_name":"Routing protocol","score":0.13233551383018494},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.07515168190002441}],"concepts":[{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.7003906965255737},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6513282060623169},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6347708702087402},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.5590260624885559},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.5448293089866638},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5349423289299011},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4809205234050751},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4636496305465698},{"id":"https://openalex.org/C184896649","wikidata":"https://www.wikidata.org/wiki/Q290066","display_name":"Routing table","level":4,"score":0.45730239152908325},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32455456256866455},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2305925488471985},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20798295736312866},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.17504918575286865},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.13233551383018494},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.07515168190002441},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7517182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517182","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6899999976158142,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1597386803","https://openalex.org/W1935628304","https://openalex.org/W2036642572","https://openalex.org/W2043976646","https://openalex.org/W2049455297","https://openalex.org/W2062143991","https://openalex.org/W2078732484","https://openalex.org/W2080910585","https://openalex.org/W2093855145","https://openalex.org/W2095596186","https://openalex.org/W2096857854","https://openalex.org/W2105874609","https://openalex.org/W2116832203","https://openalex.org/W2130225994","https://openalex.org/W2137231558","https://openalex.org/W2152309511","https://openalex.org/W6640482195","https://openalex.org/W6661357946"],"related_works":["https://openalex.org/W2347486132","https://openalex.org/W2316789606","https://openalex.org/W2350340797","https://openalex.org/W4293224283","https://openalex.org/W2950501077","https://openalex.org/W2368601041","https://openalex.org/W2079984045","https://openalex.org/W2105586767","https://openalex.org/W2127783792","https://openalex.org/W2165082655"],"abstract_inverted_index":{"The":[0],"paper":[1],"presents":[2],"the":[3,15,31,47,52,71,88],"design":[4],"of":[5,51,61],"FinFET-based":[6],"TCAMs":[7],"with":[8,36],"unevenly-segmented":[9],"matchlines":[10],"(USM).":[11],"Each":[12],"matchline":[13,89],"in":[14,46,67],"TCAM":[16,38,63,76,79],"is":[17,90],"partition":[18],"into":[19,92],"uneven":[20],"segments":[21,35],"based":[22],"on":[23],"statistical":[24],"profile":[25],"gathered":[26],"from":[27],"routing":[28],"tables.":[29],"In":[30],"USM":[32,72],"scheme,":[33,73],"those":[34],"all":[37],"cells":[39,64,80],"storing":[40],"`don't":[41],"care'":[42],"do":[43],"not":[44],"involve":[45],"charging":[48],"and":[49],"discharging":[50],"matchline,":[53],"leading":[54],"to":[55],"lower":[56],"power":[57,83],"dissipation.":[58],"Four":[59],"types":[60],"FinFET":[62,75],"are":[65],"considered":[66],"this":[68],"work.":[69],"With":[70],"a":[74],"using":[77],"Hybrid-2":[78],"can":[81],"reduce":[82],"dissipation":[84],"by":[85],"35.2%":[86],"when":[87],"partitioned":[91],"three":[93],"segments.":[94]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}