{"id":"https://openalex.org/W2483860957","doi":"https://doi.org/10.1109/asicon.2015.7517145","title":"Post-bond test for TSVs using voltage division","display_name":"Post-bond test for TSVs using voltage division","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2483860957","doi":"https://doi.org/10.1109/asicon.2015.7517145","mag":"2483860957"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7517145","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517145","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069398115","display_name":"Bingqiang Jing","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Bingqiang Jing","raw_affiliation_strings":["Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050097039","display_name":"Xiaole Cui","orcid":"https://orcid.org/0000-0002-3382-3703"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiaole Cui","raw_affiliation_strings":["Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036380720","display_name":"Yalin Ran","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yalin Ran","raw_affiliation_strings":["Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5104079377","display_name":"Yufeng Jin","orcid":"https://orcid.org/0009-0006-9750-4599"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yufeng Jin","raw_affiliation_strings":["Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"Key lab of Integrated Microsystems, Shenzhen Graduate School, Shenzhen, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5069398115"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.21248752,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13251","display_name":"Electrical and Thermal Properties of Materials","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6534528732299805},{"id":"https://openalex.org/keywords/division","display_name":"Division (mathematics)","score":0.610328733921051},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6023777723312378},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5950943827629089},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5459413528442383},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4428720474243164},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.43524807691574097},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.31539386510849},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3147642910480499},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28064507246017456},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23966863751411438}],"concepts":[{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6534528732299805},{"id":"https://openalex.org/C60798267","wikidata":"https://www.wikidata.org/wiki/Q1226939","display_name":"Division (mathematics)","level":2,"score":0.610328733921051},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6023777723312378},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5950943827629089},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5459413528442383},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4428720474243164},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.43524807691574097},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.31539386510849},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3147642910480499},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28064507246017456},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23966863751411438},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7517145","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517145","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1967196629","https://openalex.org/W1987638749","https://openalex.org/W2013679798","https://openalex.org/W2038399208","https://openalex.org/W2055841712","https://openalex.org/W2068545846","https://openalex.org/W2082497518","https://openalex.org/W2095790208","https://openalex.org/W2138951112","https://openalex.org/W4231431893"],"related_works":["https://openalex.org/W2087502554","https://openalex.org/W4213091376","https://openalex.org/W4252317921","https://openalex.org/W2038973998","https://openalex.org/W4236696036","https://openalex.org/W2330973770","https://openalex.org/W1979495818","https://openalex.org/W1975640583","https://openalex.org/W3094080891","https://openalex.org/W243046325"],"abstract_inverted_index":{"Through":[0],"Silicon":[1],"Vias":[2],"(TSVs)":[3],"are":[4,13],"the":[5,83,93,96],"transmission":[6],"lines":[7],"between":[8],"different":[9],"bonding":[10],"layers":[11],"and":[12,35,57],"indispensable":[14],"elements":[15],"in":[16,30],"three-dimensional":[17],"integrated":[18],"circuits":[19],"(3D-ICs).":[20],"But":[21],"because":[22],"of":[23,27,40,95],"process":[24,89],"problems,":[25],"kinds":[26],"defects":[28,34,56,70,77],"exist":[29],"TSVs,":[31],"including":[32,88],"open":[33,47,55],"short":[36,58],"defects.":[37,59],"A":[38],"variety":[39],"test":[41],"methods":[42],"have":[43],"been":[44],"proposed":[45],"for":[46,68],"defects,":[48],"but":[49],"few":[50],"can":[51,78],"deal":[52],"with":[53,76],"both":[54,69],"In":[60],"this":[61],"work,":[62],"a":[63],"post-bond":[64],"method":[65],"is":[66],"presented":[67],"by":[71,81],"using":[72],"voltage":[73],"division.":[74],"TSVs":[75],"be":[79],"located":[80],"testing":[82],"output":[84],"pulses.":[85],"HSPICE":[86],"simulations":[87],"parameter":[90],"variations":[91],"show":[92],"effectiveness":[94],"method.":[97]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
