{"id":"https://openalex.org/W2485535873","doi":"https://doi.org/10.1109/asicon.2015.7517142","title":"Novel CMOS technology compatible nonvolatile on-chip hybrid memory","display_name":"Novel CMOS technology compatible nonvolatile on-chip hybrid memory","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2485535873","doi":"https://doi.org/10.1109/asicon.2015.7517142","mag":"2485535873"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7517142","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517142","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103643287","display_name":"Zezhong Yang","orcid":"https://orcid.org/0009-0005-9123-448X"},"institutions":[{"id":"https://openalex.org/I37796252","display_name":"Beijing University of Technology","ror":"https://ror.org/037b1pp87","country_code":"CN","type":"education","lineage":["https://openalex.org/I37796252"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zezhong Yang","raw_affiliation_strings":["Beijing University of Technology, Beijing, CN"],"affiliations":[{"raw_affiliation_string":"Beijing University of Technology, Beijing, CN","institution_ids":["https://openalex.org/I37796252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100394108","display_name":"Jinhui Wang","orcid":"https://orcid.org/0009-0000-1584-3631"},"institutions":[{"id":"https://openalex.org/I37796252","display_name":"Beijing University of Technology","ror":"https://ror.org/037b1pp87","country_code":"CN","type":"education","lineage":["https://openalex.org/I37796252"]},{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]},{"id":"https://openalex.org/I125467818","display_name":"Dakota State University","ror":"https://ror.org/016yv6y68","country_code":"US","type":"education","lineage":["https://openalex.org/I125467818"]}],"countries":["CN","US"],"is_corresponding":false,"raw_author_name":"Jinhui Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Dakota State University, ND, USA","VLSI and System Lab, Beijing University of Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Dakota State University, ND, USA","institution_ids":["https://openalex.org/I125467818","https://openalex.org/I57328836"]},{"raw_affiliation_string":"VLSI and System Lab, Beijing University of Technology, Beijing, China","institution_ids":["https://openalex.org/I37796252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112107545","display_name":"Ligang Hou","orcid":null},"institutions":[{"id":"https://openalex.org/I37796252","display_name":"Beijing University of Technology","ror":"https://ror.org/037b1pp87","country_code":"CN","type":"education","lineage":["https://openalex.org/I37796252"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ligang Hou","raw_affiliation_strings":["VLSI and System Lab, Beijing University of Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"VLSI and System Lab, Beijing University of Technology, Beijing, China","institution_ids":["https://openalex.org/I37796252"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069728349","display_name":"Na Gong","orcid":"https://orcid.org/0000-0002-3297-7436"},"institutions":[{"id":"https://openalex.org/I125467818","display_name":"Dakota State University","ror":"https://ror.org/016yv6y68","country_code":"US","type":"education","lineage":["https://openalex.org/I125467818"]},{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Na Gong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Dakota State University, ND, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Dakota State University, ND, USA","institution_ids":["https://openalex.org/I125467818","https://openalex.org/I57328836"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5103643287"],"corresponding_institution_ids":["https://openalex.org/I37796252"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.21270643,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8812499642372131},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.794477641582489},{"id":"https://openalex.org/keywords/sleep-mode","display_name":"Sleep mode","score":0.6782975792884827},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6147606372833252},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5888881683349609},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5566782355308533},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5118776559829712},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4956413507461548},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4279515743255615},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.413875937461853},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.41146624088287354},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.36185482144355774},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3405689299106598},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.32900696992874146},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3157825469970703},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.31208187341690063},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29636919498443604},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22862961888313293},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.18357017636299133}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8812499642372131},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.794477641582489},{"id":"https://openalex.org/C57149124","wikidata":"https://www.wikidata.org/wiki/Q587346","display_name":"Sleep mode","level":4,"score":0.6782975792884827},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6147606372833252},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5888881683349609},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5566782355308533},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5118776559829712},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4956413507461548},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4279515743255615},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.413875937461853},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.41146624088287354},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36185482144355774},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3405689299106598},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.32900696992874146},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3157825469970703},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.31208187341690063},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29636919498443604},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22862961888313293},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.18357017636299133},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7517142","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517142","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1988704452","https://openalex.org/W2021797032","https://openalex.org/W2138546378","https://openalex.org/W2144308571","https://openalex.org/W2990177142","https://openalex.org/W4239979555","https://openalex.org/W4245045245","https://openalex.org/W4285718364","https://openalex.org/W4302467419"],"related_works":["https://openalex.org/W4285257158","https://openalex.org/W1977963439","https://openalex.org/W776329307","https://openalex.org/W2181798140","https://openalex.org/W2898989424","https://openalex.org/W2315140189","https://openalex.org/W2023756866","https://openalex.org/W2505369450","https://openalex.org/W4238754064","https://openalex.org/W2142941833"],"abstract_inverted_index":{"A":[0],"hybrid":[1,90,115],"memory":[2,116],"is":[3,67,73,110,121,137,141],"proposed":[4],"in":[5,24,27,54],"this":[6],"paper,":[7],"it":[8],"consists":[9],"of":[10,47,71,105],"conventional":[11,125,130],"six":[12],"transistors":[13],"SRAM":[14,132],"cell":[15],"and":[16,37,83,97],"nonvolatile":[17,35],"part,":[18,36],"to":[19,34,41,56,87,107,113,123,129],"reduce":[20],"static":[21],"leakage":[22],"current":[23],"sleep":[25],"mode,":[26],"the":[28,32,39,45,58,62,89,98,103,124],"way":[29],"that":[30,102],"store":[31,57],"value":[33,40],"restore":[38],"volatile":[42],"part":[43],"at":[44],"beginning":[46],"work":[48,117],"mode.":[49],"It":[50],"can":[51],"be":[52],"used":[53],"SOC":[55],"control":[59],"words":[60],"as":[61],"whole":[63],"chip's":[64],"power":[65],"supply":[66],"off.":[68],"The":[69,119],"method":[70],"operation":[72],"presented.":[74],"Charge":[75],"pump,":[76],"sense":[77],"amplifier,":[78],"level":[79],"shifter,":[80],"pre-charge":[81],"circuit,":[82],"structure":[84],"are":[85,94],"presented":[86],"implement":[88],"memory.":[91],"Monte-carlo":[92],"simulations":[93],"carried":[95],"out,":[96],"simulation":[99],"results":[100],"show":[101],"reliability":[104],"restoring":[106],"process":[108],"variation":[109],"high":[111],"enough":[112],"ensure":[114],"properly.":[118],"SNM":[120],"same":[122],"6T":[126,131],"SRAM.":[127],"Compare":[128],"cell,":[133],"34.7%":[134],"write":[135],"time":[136,140],"cost,":[138],"read":[139],"same.":[142]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
