{"id":"https://openalex.org/W2477224134","doi":"https://doi.org/10.1109/asicon.2015.7517029","title":"An efficient layered ABV methodology for vision system on chip based on heterogeneous parallel processors","display_name":"An efficient layered ABV methodology for vision system on chip based on heterogeneous parallel processors","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2477224134","doi":"https://doi.org/10.1109/asicon.2015.7517029","mag":"2477224134"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7517029","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517029","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078110786","display_name":"Victor Nshunguyimfura","orcid":null},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Victor Nshunguyimfura","raw_affiliation_strings":["Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007036605","display_name":"Jie Yang","orcid":"https://orcid.org/0000-0002-4148-0042"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Yang","raw_affiliation_strings":["Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100657035","display_name":"Liyuan Liu","orcid":"https://orcid.org/0000-0003-2585-323X"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liyuan Liu","raw_affiliation_strings":["Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110665174","display_name":"Nanjian Wu","orcid":"https://orcid.org/0000-0001-8022-0262"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Nanjian Wu","raw_affiliation_strings":["Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5078110786"],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210149211"],"apc_list":null,"apc_paid":null,"fwci":0.323,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.64053348,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"7","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7855716943740845},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6503759622573853},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.6040139198303223},{"id":"https://openalex.org/keywords/assertion","display_name":"Assertion","score":0.5378031134605408},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.5319799184799194},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5314463973045349},{"id":"https://openalex.org/keywords/dependency","display_name":"Dependency (UML)","score":0.5129870772361755},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4648614823818207},{"id":"https://openalex.org/keywords/microelectronics","display_name":"Microelectronics","score":0.4625038802623749},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43844446539878845},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3756966292858124},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14010068774223328},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11781448125839233},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1056322455406189}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7855716943740845},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6503759622573853},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.6040139198303223},{"id":"https://openalex.org/C40422974","wikidata":"https://www.wikidata.org/wiki/Q741248","display_name":"Assertion","level":2,"score":0.5378031134605408},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.5319799184799194},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5314463973045349},{"id":"https://openalex.org/C19768560","wikidata":"https://www.wikidata.org/wiki/Q320727","display_name":"Dependency (UML)","level":2,"score":0.5129870772361755},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4648614823818207},{"id":"https://openalex.org/C187937830","wikidata":"https://www.wikidata.org/wiki/Q175403","display_name":"Microelectronics","level":2,"score":0.4625038802623749},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43844446539878845},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3756966292858124},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14010068774223328},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11781448125839233},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1056322455406189},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7517029","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517029","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","score":0.4099999964237213,"display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W67485690","https://openalex.org/W567973435","https://openalex.org/W617996372","https://openalex.org/W1490819086","https://openalex.org/W1492291048","https://openalex.org/W1541510538","https://openalex.org/W1547304883","https://openalex.org/W1561115693","https://openalex.org/W1576418322","https://openalex.org/W1582385421","https://openalex.org/W1714370737","https://openalex.org/W2008802978","https://openalex.org/W2024436253","https://openalex.org/W2086053354","https://openalex.org/W2117006807","https://openalex.org/W2125430715","https://openalex.org/W2144919771","https://openalex.org/W2154206750","https://openalex.org/W2156571376","https://openalex.org/W2160892751","https://openalex.org/W2281802530","https://openalex.org/W2552109100","https://openalex.org/W4255535261","https://openalex.org/W6616133572","https://openalex.org/W6629281942","https://openalex.org/W6632526158","https://openalex.org/W6634996309"],"related_works":["https://openalex.org/W1498103021","https://openalex.org/W4230849338","https://openalex.org/W4295166216","https://openalex.org/W2177044681","https://openalex.org/W1968067090","https://openalex.org/W2090313512","https://openalex.org/W2345942070","https://openalex.org/W2141398161","https://openalex.org/W2016410697","https://openalex.org/W39611005"],"abstract_inverted_index":{"The":[0,21,35,105],"demand":[1],"of":[2,24,29,74],"higher":[3],"performance":[4],"system":[5,48],"on":[6,10,49,52,58,68],"chip":[7,26,50],"(SoC)":[8],"based":[9,51],"massively":[11],"parallel":[12,54],"processors":[13],"has":[14,93,110],"increased":[15],"significantly":[16],"throughout":[17],"the":[18,25,30,59,72,85,102,113],"last":[19],"decades.":[20],"design":[22,80],"verification":[23,63,77,86,103,114],"becomes":[27],"one":[28],"major":[31],"challenges":[32],"in":[33,97],"microelectronics.":[34],"paper":[36],"proposes":[37],"an":[38],"efficient":[39],"Layered":[40],"Assertion":[41],"Based":[42],"Verification":[43],"(L-ABV)":[44],"methodology":[45],"for":[46],"vision":[47,60],"heterogeneous":[53],"processors.":[55],"It":[56],"focuses":[57],"SoC":[61,99],"pre-silicon":[62],"solutions.":[64],"First,":[65],"we":[66,83],"discuss":[67],"how":[69],"to":[70,100],"reduce":[71],"degree":[73],"dependency":[75],"between":[76],"task":[78,87],"and":[79],"task.":[81],"Then":[82],"split":[84],"into":[88],"different":[89],"logic":[90],"layers.":[91],"L-ABV":[92],"been":[94],"successfully":[95],"used":[96],"Vision":[98],"increase":[101],"productivity.":[104],"result":[106],"shows":[107],"that":[108],"it":[109],"effectively":[111],"shortened":[112],"time.":[115]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}