{"id":"https://openalex.org/W2503027088","doi":"https://doi.org/10.1109/asicon.2015.7517027","title":"Image synthesis circuit design using selector-logic-based alpha blending and its FPGA implementation","display_name":"Image synthesis circuit design using selector-logic-based alpha blending and its FPGA implementation","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2503027088","doi":"https://doi.org/10.1109/asicon.2015.7517027","mag":"2503027088"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7517027","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517027","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027149855","display_name":"Igarashi Keita","orcid":null},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Keita Igarashi","raw_affiliation_strings":["Dept. of Computer Science and Communications Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Communications Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061982025","display_name":"Masao Yanagisawa","orcid":"https://orcid.org/0000-0002-5168-3214"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masao Yanagisawa","raw_affiliation_strings":["Dept. of Computer Science and Communications Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Communications Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087516286","display_name":"Nozomu Togawa","orcid":"https://orcid.org/0000-0003-3400-3587"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Nozomu Togawa","raw_affiliation_strings":["Dept. of Computer Science and Communications Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Communications Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I150744194"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"18","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9854000210762024,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8130417466163635},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.6534439921379089},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6270709037780762},{"id":"https://openalex.org/keywords/alpha","display_name":"Alpha (finance)","score":0.5684637427330017},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.5118147730827332},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.475410521030426},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4305366277694702},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.41528043150901794},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3989757299423218},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3211256265640259},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2478507161140442},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19318529963493347},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.0646480917930603}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8130417466163635},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.6534439921379089},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6270709037780762},{"id":"https://openalex.org/C64943373","wikidata":"https://www.wikidata.org/wiki/Q2651003","display_name":"Alpha (finance)","level":4,"score":0.5684637427330017},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.5118147730827332},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.475410521030426},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4305366277694702},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.41528043150901794},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3989757299423218},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3211256265640259},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2478507161140442},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19318529963493347},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0646480917930603},{"id":"https://openalex.org/C171606756","wikidata":"https://www.wikidata.org/wiki/Q506132","display_name":"Psychometrics","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C49453240","wikidata":"https://www.wikidata.org/wiki/Q1592163","display_name":"Construct validity","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7517027","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7517027","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1817415233","https://openalex.org/W1976814565","https://openalex.org/W1978527784","https://openalex.org/W2061619473","https://openalex.org/W2105658590","https://openalex.org/W2113524221","https://openalex.org/W2121641894","https://openalex.org/W2163894825","https://openalex.org/W2166416373","https://openalex.org/W2294365073","https://openalex.org/W6677932739"],"related_works":["https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2789349722","https://openalex.org/W1985308002","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W2059422871","https://openalex.org/W2766377030","https://openalex.org/W2041787842","https://openalex.org/W2170504327"],"abstract_inverted_index":{"Alpha":[0],"blending":[1,30,48],"is":[2,88],"one":[3],"of":[4],"image":[5,12],"synthesis":[6],"techniques,":[7],"which":[8],"synthesizes":[9],"a":[10,58,76,84],"new":[11,85],"by":[13],"summing":[14],"up":[15],"weighted":[16],"input":[17,92],"images":[18],"and":[19,34,56,61,82,100],"realizes":[20],"transparent":[21],"effect.":[22],"In":[23,67],"this":[24],"paper,":[25],"we":[26],"focus":[27],"on":[28,37,78,91],"alpha":[29,47,108],"using":[31,105],"selector":[32,43],"logics":[33,44],"implement":[35],"it":[36],"an":[38],"FPGA":[39,80],"board.":[40],"By":[41],"applying":[42],"to":[45],"the":[46,79],"operation,":[49],"its":[50],"total":[51],"product":[52],"terms":[53],"are":[54,64,73],"decreased":[55],"thus":[57],"circuit":[59,62],"size":[60],"delay":[63],"improved":[65],"simultaneously.":[66],"our":[68],"implementation,":[69],"original":[70],"pixel":[71,86],"values":[72],"stored":[74],"into":[75],"memory":[77],"board":[81],"then":[83],"value":[87],"synthesized":[89],"based":[90,107],"transmittance":[93],"factors.":[94],"We":[95],"realize":[96],"approximately":[97],"23%":[98],"speed-up":[99],"8%":[101],"area":[102],"reduction":[103],"simultaneously":[104],"selector-logic":[106],"blending.":[109]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
