{"id":"https://openalex.org/W2503972248","doi":"https://doi.org/10.1109/asicon.2015.7516937","title":"A 1.5-GS/s 5-bit interpolating ADC with offset averaging and interpolating sharing resistors network","display_name":"A 1.5-GS/s 5-bit interpolating ADC with offset averaging and interpolating sharing resistors network","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2503972248","doi":"https://doi.org/10.1109/asicon.2015.7516937","mag":"2503972248"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7516937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7516937","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103777747","display_name":"Rongjin Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Rongjin Xu","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101867100","display_name":"Yongzhen Chen","orcid":"https://orcid.org/0000-0002-1018-6289"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yongzhen Chen","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056946496","display_name":"Mingshuo Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mingshuo Wang","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100368978","display_name":"Ning Li","orcid":"https://orcid.org/0000-0001-8336-5985"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ning Li","raw_affiliation_strings":["Department of Microelectronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025053306","display_name":"Fan Ye","orcid":"https://orcid.org/0000-0002-1089-1498"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Ye","raw_affiliation_strings":["Department of Microelectronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016448886","display_name":"Junyan Ren","orcid":"https://orcid.org/0000-0002-7799-6251"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junyan Ren","raw_affiliation_strings":["Department of Microelectronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5103777747"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.21037373,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.6947073340415955},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6722695231437683},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47370168566703796},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22272691130638123},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11443883180618286}],"concepts":[{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.6947073340415955},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6722695231437683},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47370168566703796},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22272691130638123},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11443883180618286},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7516937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7516937","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8899999856948853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320335773","display_name":"National High-tech Research and Development Program","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1992430382","https://openalex.org/W2078887365","https://openalex.org/W2086856502","https://openalex.org/W2118530541","https://openalex.org/W2150419881","https://openalex.org/W4248053622","https://openalex.org/W4301707095","https://openalex.org/W4302354803"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W3200817179","https://openalex.org/W1960166976","https://openalex.org/W2380067098","https://openalex.org/W1992708211","https://openalex.org/W1548152478","https://openalex.org/W2137172615","https://openalex.org/W2112564789","https://openalex.org/W2106247205","https://openalex.org/W2543503210"],"abstract_inverted_index":{"In":[0,42],"this":[1],"paper,":[2],"a":[3,51,131],"1.5-GS/s":[4],"5-bit":[5],"interpolating":[6,14,40,96],"analog-to-digital":[7],"converter":[8],"(ADC)":[9],"with":[10],"offset":[11,64],"averaging":[12,65],"and":[13,30,39,59,66,87,108],"sharing":[15,68],"resistors":[16,69],"network":[17,70],"(OAISRN)":[18],"is":[19,24,83,93,127],"presented.":[20],"The":[21,95,124],"proposed":[22],"OAISRN":[23,82],"based":[25],"on":[26,90],"conventional":[27],"flash":[28],"ADC":[29,97],"the":[31,72,81],"concept":[32],"of":[33,57,80,105,110,134],"zero":[34,74],"crossing":[35,75],"points":[36,76],"in":[37,85,98,122],"folding":[38],"architecture.":[41],"order":[43],"to":[44,49],"reduce":[45],"power":[46,125],"dissipation":[47],"yet":[48],"make":[50],"high":[52],"performance,":[53],"it":[54],"removes":[55],"half":[56],"preamplifiers":[58],"ensures":[60],"matching":[61],"by":[62],"using":[63],"2x-interpolation":[67],"behind":[71],"initial":[73],"generators":[77],"array.":[78],"Implementation":[79],"explained":[84],"detail":[86],"its":[88],"impact":[89],"signal":[91],"bandwidth":[92],"discussed.":[94],"TSMC":[99],"65":[100],"nm":[101],"process":[102],"achieves":[103],"SNDR":[104],"27.8":[106],"dB":[107,112],"SFDR":[109],"37.7":[111],"for":[113],"745":[114],"MHz":[115],"input":[116],"frequency":[117],"located":[118],"at":[119],"1.5":[120],"GS/s":[121],"postsimulation.":[123],"consumption":[126],"9.6":[128],"mW":[129],"under":[130],"supply":[132],"voltage":[133],"1.2":[135],"V.":[136]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
