{"id":"https://openalex.org/W2497486935","doi":"https://doi.org/10.1109/asicon.2015.7516884","title":"A 0.3V-to-1.1V standard cell library in 40nm CMOS","display_name":"A 0.3V-to-1.1V standard cell library in 40nm CMOS","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2497486935","doi":"https://doi.org/10.1109/asicon.2015.7516884","mag":"2497486935"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2015.7516884","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7516884","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100334715","display_name":"Jintao Li","orcid":"https://orcid.org/0000-0003-0403-6767"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jintao Li","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100642558","display_name":"Ming Liu","orcid":"https://orcid.org/0000-0001-9849-1845"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Liu","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070830194","display_name":"Hong Chen","orcid":"https://orcid.org/0000-0002-0325-2786"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hong Chen","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100334715"],"corresponding_institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.21418189,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7349568605422974},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.720524787902832},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.693561315536499},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5491358637809753},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5331598520278931},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.49378499388694763},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48233696818351746},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4442845582962036},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42611706256866455},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3158596158027649},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25054246187210083},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2490409016609192}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7349568605422974},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.720524787902832},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.693561315536499},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5491358637809753},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5331598520278931},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.49378499388694763},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48233696818351746},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4442845582962036},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42611706256866455},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3158596158027649},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25054246187210083},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2490409016609192},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2015.7516884","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2015.7516884","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 11th International Conference on ASIC (ASICON)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1491082069","https://openalex.org/W2010635096","https://openalex.org/W2012616521","https://openalex.org/W2075966063","https://openalex.org/W2076654948","https://openalex.org/W2087107264","https://openalex.org/W2122144284","https://openalex.org/W2159243841","https://openalex.org/W2236048664","https://openalex.org/W2533310835","https://openalex.org/W4230854430","https://openalex.org/W4236811439"],"related_works":["https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2373777250","https://openalex.org/W2353956655","https://openalex.org/W2020653254","https://openalex.org/W2166006392","https://openalex.org/W4400235630","https://openalex.org/W2389800961","https://openalex.org/W1995389502","https://openalex.org/W98108296"],"abstract_inverted_index":{"Processor":[0],"operating":[1],"over":[2],"a":[3,23,31,45],"wide":[4,37],"voltage":[5,38],"range":[6],"achieves":[7],"better":[8,71],"possible":[9],"energy":[10],"efficiency":[11],"while":[12],"satisfying":[13],"varying":[14],"performance":[15],"demands":[16],"of":[17],"the":[18,58,110],"applications.":[19],"To":[20],"enable":[21],"such":[22],"processor":[24],"that":[25],"can":[26],"operate":[27],"correctly":[28],"and":[29,80,86,94,100],"efficiently,":[30],"standard":[32,49],"cell":[33,50],"library":[34,51],"specific":[35],"for":[36],"operation":[39],"is":[40],"necessary.":[41],"This":[42],"paper":[43],"describes":[44],"40nm":[46],"0.3V-1.1V":[47],"CMOS":[48],"by":[52,62],"using":[53],"sizing":[54,66],"method":[55],"to":[56],"optimize":[57],"original":[59],"one":[60],"provided":[61],"foundry.":[63],"By":[64],"detailed":[65],"constraint,":[67],"individual":[68],"cells":[69],"show":[70,96],"noise":[72],"margin":[73],"under":[74],"process":[75],"variation":[76],"at":[77,84,106],"0.3":[78],"V":[79],"0.6V,":[81],"faster":[82],"speed":[83,98],"0.6V":[85,107],"1.1V.":[87],"Evaluation":[88],"with":[89,109],"benchmark":[90],"circuits":[91],"form":[92],"ISCAS'89":[93],"ITC'99":[95],"4.5%-6.9%":[97],"improvement":[99],"6.7%-22.3%":[101],"less":[102],"power":[103],"comsumption":[104],"synthesized":[105],"compared":[108],"foundry-provided":[111],"one.":[112]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
