{"id":"https://openalex.org/W2082153920","doi":"https://doi.org/10.1109/asicon.2011.6157300","title":"System level performance evaluation of three-dimensional integrated circuit","display_name":"System level performance evaluation of three-dimensional integrated circuit","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W2082153920","doi":"https://doi.org/10.1109/asicon.2011.6157300","mag":"2082153920"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157300","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017660654","display_name":"Libo Qian","orcid":"https://orcid.org/0000-0002-7593-6730"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Libo Qian","raw_affiliation_strings":["Microelectronics Institute, Xidian University, Xi'an 710071, China","Microelectronics Institute, Xidian University, Xi'an, 710071 China)"],"affiliations":[{"raw_affiliation_string":"Microelectronics Institute, Xidian University, Xi'an 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Microelectronics Institute, Xidian University, Xi'an, 710071 China)","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039575274","display_name":"Zhangming Zhu","orcid":"https://orcid.org/0000-0002-7764-1928"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Microelectronics Institute, Xidian University, Xi'an 710071, China","Microelectronics Institute, Xidian University, Xi'an, 710071 China)"],"affiliations":[{"raw_affiliation_string":"Microelectronics Institute, Xidian University, Xi'an 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Microelectronics Institute, Xidian University, Xi'an, 710071 China)","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100402361","display_name":"Yintang Yang","orcid":"https://orcid.org/0000-0001-9745-5404"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yintang Yang","raw_affiliation_strings":["Microelectronics Institute, Xidian University, Xi'an 710071, China","Microelectronics Institute, Xidian University, Xi'an, 710071 China)"],"affiliations":[{"raw_affiliation_string":"Microelectronics Institute, Xidian University, Xi'an 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Microelectronics Institute, Xidian University, Xi'an, 710071 China)","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5017660654"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12606224,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"694","last_page":"697"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.6129438281059265},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5377815365791321},{"id":"https://openalex.org/keywords/discrete-circuit","display_name":"Discrete circuit","score":0.5163730382919312},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.5016791820526123},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.49206823110580444},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46308833360671997},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45938044786453247},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44194158911705017},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.42750316858291626},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.4140055179595947},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26140567660331726},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24039649963378906},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08479925990104675},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08242368698120117},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07873550057411194}],"concepts":[{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.6129438281059265},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5377815365791321},{"id":"https://openalex.org/C188058453","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Discrete circuit","level":4,"score":0.5163730382919312},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.5016791820526123},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.49206823110580444},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46308833360671997},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45938044786453247},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44194158911705017},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.42750316858291626},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.4140055179595947},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26140567660331726},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24039649963378906},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08479925990104675},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08242368698120117},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07873550057411194},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157300","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2026717319","https://openalex.org/W2101846378","https://openalex.org/W2103714239","https://openalex.org/W2143639388","https://openalex.org/W3111163017"],"related_works":["https://openalex.org/W2390607226","https://openalex.org/W2355158303","https://openalex.org/W2129446522","https://openalex.org/W2018705424","https://openalex.org/W2015676400","https://openalex.org/W2181172762","https://openalex.org/W3034130800","https://openalex.org/W3166836537","https://openalex.org/W2393658466","https://openalex.org/W2081795747"],"abstract_inverted_index":{"Based":[0],"on":[1,42],"a":[2,61],"stochastic":[3],"wire":[4],"length":[5,12],"distributed":[6],"model,":[7,31],"the":[8,11,27,32,37,43,49,67],"reduction":[9],"in":[10,46,92],"of":[13,29,34,36,39,48,51,70,84],"interconnects":[14],"and":[15,53],"gate":[16],"pitch":[17],"for":[18],"three-dimensional":[19],"(3D)":[20],"integrated":[21,64,94],"circuit":[22,65,72,95],"is":[23,56,77],"predicted":[24],"exactly.":[25],"Using":[26],"results":[28,59],"this":[30],"impact":[33],"increasing":[35],"number":[38],"active":[40,75],"layers":[41,76],"system":[44,68],"performance":[45,69],"term":[47],"product":[50],"delay":[52],"power":[54],"dissipation":[55],"evaluated.":[57],"Comparative":[58],"with":[60,73],"two-dimensional":[62],"(2D)":[63],"show":[66],"3D":[71,89],"two":[74],"improved":[78],"at":[79,82],"least":[80],"50%":[81],"sacrifice":[83],"10%":[85],"chip":[86],"temperature,":[87],"demonstrating":[88],"integration":[90],"advantage":[91],"future":[93],"design.":[96]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
