{"id":"https://openalex.org/W1973360595","doi":"https://doi.org/10.1109/asicon.2011.6157186","title":"Separate projection and extended Cauer method for circuit reduction","display_name":"Separate projection and extended Cauer method for circuit reduction","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W1973360595","doi":"https://doi.org/10.1109/asicon.2011.6157186","mag":"1973360595"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157186","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157186","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110223905","display_name":"Goro Suzuki","orcid":null},"institutions":[{"id":"https://openalex.org/I17056963","display_name":"The University of Kitakyushu","ror":"https://ror.org/03mfefw72","country_code":"JP","type":"education","lineage":["https://openalex.org/I17056963"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Goro Suzuki","raw_affiliation_strings":["University of Kitakyushu, Japan","University of Kitakyushu, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"University of Kitakyushu, Japan","institution_ids":["https://openalex.org/I17056963"]},{"raw_affiliation_string":"University of Kitakyushu, Japan#TAB#","institution_ids":["https://openalex.org/I17056963"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5110223905"],"corresponding_institution_ids":["https://openalex.org/I17056963"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05177913,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"23","issue":null,"first_page":"319","last_page":"323"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.7368829250335693},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.6606187224388123},{"id":"https://openalex.org/keywords/projection","display_name":"Projection (relational algebra)","score":0.6594616770744324},{"id":"https://openalex.org/keywords/transfer-function","display_name":"Transfer function","score":0.5607300400733948},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5063327550888062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49794745445251465},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.4949440360069275},{"id":"https://openalex.org/keywords/network-analysis","display_name":"Network analysis","score":0.4832063913345337},{"id":"https://openalex.org/keywords/projection-method","display_name":"Projection method","score":0.46383628249168396},{"id":"https://openalex.org/keywords/linear-circuit","display_name":"Linear circuit","score":0.4447333812713623},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3808383345603943},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.33616122603416443},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2879509925842285},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2607433795928955},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18089652061462402},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15401795506477356},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1534511148929596},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10107558965682983}],"concepts":[{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.7368829250335693},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.6606187224388123},{"id":"https://openalex.org/C57493831","wikidata":"https://www.wikidata.org/wiki/Q3134666","display_name":"Projection (relational algebra)","level":2,"score":0.6594616770744324},{"id":"https://openalex.org/C81299745","wikidata":"https://www.wikidata.org/wiki/Q334269","display_name":"Transfer function","level":2,"score":0.5607300400733948},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5063327550888062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49794745445251465},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.4949440360069275},{"id":"https://openalex.org/C32946077","wikidata":"https://www.wikidata.org/wiki/Q618079","display_name":"Network analysis","level":2,"score":0.4832063913345337},{"id":"https://openalex.org/C65557600","wikidata":"https://www.wikidata.org/wiki/Q7249451","display_name":"Projection method","level":3,"score":0.46383628249168396},{"id":"https://openalex.org/C194571574","wikidata":"https://www.wikidata.org/wiki/Q2251187","display_name":"Linear circuit","level":4,"score":0.4447333812713623},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3808383345603943},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.33616122603416443},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2879509925842285},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2607433795928955},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18089652061462402},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15401795506477356},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1534511148929596},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10107558965682983},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C202426404","wikidata":"https://www.wikidata.org/wiki/Q5318686","display_name":"Dykstra's projection algorithm","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157186","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157186","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6100000143051147,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W571322228","https://openalex.org/W650746161","https://openalex.org/W2113377690","https://openalex.org/W2126266252","https://openalex.org/W2138502225","https://openalex.org/W2541374461","https://openalex.org/W4206454995","https://openalex.org/W4230077583","https://openalex.org/W4247479148"],"related_works":["https://openalex.org/W2356048238","https://openalex.org/W2728962687","https://openalex.org/W2100955979","https://openalex.org/W2356506626","https://openalex.org/W1977988436","https://openalex.org/W2101102909","https://openalex.org/W1552965995","https://openalex.org/W2100431333","https://openalex.org/W1984812621","https://openalex.org/W2098044501"],"abstract_inverted_index":{"We":[0],"propose":[1],"novel":[2],"separate":[3],"projection":[4],"and":[5,13,35,38],"extended":[6],"Cauer":[7],"method":[8],"for":[9],"multi-port":[10],"circuit":[11,15,34,40,62],"reduction":[12,32],"equivalent":[14,39],"synthesis.":[16],"Small":[17],"degree":[18],"transfer":[19,47],"functions":[20],"can":[21,41,55],"be":[22,42],"made":[23],"independently":[24],"on":[25,45],"the":[26,58,61],"number":[27],"of":[28,51,60],"interface":[29],"terminals":[30],"between":[31],"target":[33],"nonreduction":[36],"target,":[37],"synthesized":[43],"based":[44],"these":[46,52],"functions.":[48],"The":[49],"combination":[50],"two":[53],"methods":[54],"contribute":[56],"to":[57],"acceleration":[59],"analysis":[63],"CPU":[64],"time.":[65]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
