{"id":"https://openalex.org/W2081469679","doi":"https://doi.org/10.1109/asicon.2011.6157172","title":"HV CMOS orientated variation-aware layout and robust solution","display_name":"HV CMOS orientated variation-aware layout and robust solution","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W2081469679","doi":"https://doi.org/10.1109/asicon.2011.6157172","mag":"2081469679"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157172","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157172","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101469384","display_name":"Cong Gu","orcid":"https://orcid.org/0000-0001-6327-1068"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Gu Cong","raw_affiliation_strings":["Design Enable Group, R ASa, Freescale Semiconductor Limited, Beijing, China","Design Enable Group, RASG, Freescale Semiconductor Ltd, Exchange Building, 118 Jianguo Road, Chao Yang, Beijing, 100022, China"],"affiliations":[{"raw_affiliation_string":"Design Enable Group, R ASa, Freescale Semiconductor Limited, Beijing, China","institution_ids":[]},{"raw_affiliation_string":"Design Enable Group, RASG, Freescale Semiconductor Ltd, Exchange Building, 118 Jianguo Road, Chao Yang, Beijing, 100022, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100761000","display_name":"Chen Hong","orcid":"https://orcid.org/0000-0002-1376-9789"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chen Hong","raw_affiliation_strings":["Design Enable Group, R ASa, Freescale Semiconductor Limited, Beijing, China","Design Enable Group, RASG, Freescale Semiconductor Ltd, Exchange Building, 118 Jianguo Road, Chao Yang, Beijing, 100022, China"],"affiliations":[{"raw_affiliation_string":"Design Enable Group, R ASa, Freescale Semiconductor Limited, Beijing, China","institution_ids":[]},{"raw_affiliation_string":"Design Enable Group, RASG, Freescale Semiconductor Ltd, Exchange Building, 118 Jianguo Road, Chao Yang, Beijing, 100022, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101469384"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20170443,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"263","last_page":"266"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12111","display_name":"Industrial Vision Systems and Defect Detection","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12111","display_name":"Industrial Vision Systems and Defect Detection","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9661999940872192,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.7747966051101685},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7661209106445312},{"id":"https://openalex.org/keywords/product","display_name":"Product (mathematics)","score":0.5241175889968872},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4744884967803955},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4656760096549988},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.43607833981513977},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40346449613571167},{"id":"https://openalex.org/keywords/manufacturing-engineering","display_name":"Manufacturing engineering","score":0.37326255440711975},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3280869722366333},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2666190266609192},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.13406750559806824},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0987059473991394}],"concepts":[{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.7747966051101685},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7661209106445312},{"id":"https://openalex.org/C90673727","wikidata":"https://www.wikidata.org/wiki/Q901718","display_name":"Product (mathematics)","level":2,"score":0.5241175889968872},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4744884967803955},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4656760096549988},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.43607833981513977},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40346449613571167},{"id":"https://openalex.org/C117671659","wikidata":"https://www.wikidata.org/wiki/Q11049265","display_name":"Manufacturing engineering","level":1,"score":0.37326255440711975},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3280869722366333},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2666190266609192},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.13406750559806824},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0987059473991394},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157172","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157172","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2505986678"],"related_works":["https://openalex.org/W2386430105","https://openalex.org/W2356521405","https://openalex.org/W2038534795","https://openalex.org/W2384358604","https://openalex.org/W1567829292","https://openalex.org/W3001063351","https://openalex.org/W3196905815","https://openalex.org/W2137012493","https://openalex.org/W2959030164","https://openalex.org/W1564147575"],"abstract_inverted_index":{"Ignoring":[0],"variation":[1,11,57],"causes":[2],"final":[3],"product":[4],"yield":[5],"loss":[6],"while":[7],"disclosure":[8],"of":[9,12,19,56],"any":[10],"silicon":[13],"manufacturing":[14],"will":[15],"improve":[16],"the":[17,21,28,37],"speed":[18],"getting":[20],"new-product":[22],"to":[23],"market.":[24],"This":[25],"paper":[26],"presents":[27],"variations":[29],"from":[30],"device":[31,47],"layout":[32],"orientation":[33],"as":[34],"observed":[35],"through":[36],"foundry":[38],"WAT":[39],"data":[40],"and":[41,50],"correlation":[42],"analysis":[43],"versus":[44],"HV":[45],"CMOS":[46],"model":[48],"corners":[49],"technology":[51],"specs.":[52],"A":[53],"robust":[54],"solution":[55],"elimination":[58],"is":[59],"also":[60],"presented.":[61]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
