{"id":"https://openalex.org/W2049637129","doi":"https://doi.org/10.1109/asicon.2011.6157118","title":"A hardware/software co-design approach for multiple-standard video bitstream parsing","display_name":"A hardware/software co-design approach for multiple-standard video bitstream parsing","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W2049637129","doi":"https://doi.org/10.1109/asicon.2011.6157118","mag":"2049637129"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157118","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157118","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103422594","display_name":"Sha Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Sha Shen","raw_affiliation_strings":["The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064918319","display_name":"Huibo Zhong","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huibo Zhong","raw_affiliation_strings":["The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085004179","display_name":"Yibo Fan","orcid":"https://orcid.org/0000-0003-2523-8261"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yibo Fan","raw_affiliation_strings":["The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5115590332","display_name":"Xiaoyang Zeng","orcid":"https://orcid.org/0000-0003-3986-137X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyang Zeng","raw_affiliation_strings":["The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The State key Laboratory of ASIC and system, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"The State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12410802,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"43","last_page":"46"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8196767568588257},{"id":"https://openalex.org/keywords/header","display_name":"Header","score":0.7527282238006592},{"id":"https://openalex.org/keywords/parsing","display_name":"Parsing","score":0.712588369846344},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.6948019862174988},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5887464284896851},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5776042342185974},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.48107242584228516},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3466629385948181},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.32275861501693726},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2744966149330139},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10828444361686707}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8196767568588257},{"id":"https://openalex.org/C48105269","wikidata":"https://www.wikidata.org/wiki/Q1141160","display_name":"Header","level":2,"score":0.7527282238006592},{"id":"https://openalex.org/C186644900","wikidata":"https://www.wikidata.org/wiki/Q194152","display_name":"Parsing","level":2,"score":0.712588369846344},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.6948019862174988},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5887464284896851},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5776042342185974},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.48107242584228516},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3466629385948181},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.32275861501693726},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2744966149330139},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10828444361686707},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157118","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157118","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W832984975","https://openalex.org/W1597371768","https://openalex.org/W1969476471","https://openalex.org/W2102997778","https://openalex.org/W2106219841","https://openalex.org/W2140199336","https://openalex.org/W2171576326","https://openalex.org/W6635509967","https://openalex.org/W6642423054"],"related_works":["https://openalex.org/W2171597999","https://openalex.org/W2189136227","https://openalex.org/W1866537546","https://openalex.org/W630850086","https://openalex.org/W3200508093","https://openalex.org/W4372053344","https://openalex.org/W3193978431","https://openalex.org/W2379752180","https://openalex.org/W1971375954","https://openalex.org/W4301007793"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,34,71],"hardware/software":[4,35],"co-design":[5,73],"approach":[6,74,121],"is":[7,31,37,109],"proposed":[8,38,70],"to":[9,16,41,77,92,137],"parse":[10,93],"the":[11,25,42,79,97,125,135],"video":[12,18,29,140],"bitstream":[13],"which":[14],"conforms":[15],"various":[17],"compression":[19],"standards.":[20,142],"The":[21],"layered":[22],"structure":[23],"of":[24,81,100,114,127],"syntax":[26,46,61],"elements":[27,47,62],"in":[28,48,63,75,103],"bitstreams":[30],"analyzed.":[32],"Then":[33],"partition":[36],"accordingly.":[39],"Due":[40],"high":[43],"data":[44,50],"rate,":[45],"slice":[49,64,104],"and":[51,66,84,106],"lower":[52],"layers":[53],"are":[54,90],"commonly":[55],"parsed":[56],"by":[57,111],"hardware.":[58],"As":[59],"for":[60],"header":[65,105],"upper":[67,107],"layers,":[68],"we":[69],"hw/sw":[72],"order":[76],"combine":[78],"advantage":[80],"hardware":[82,88,115],"acceleration":[83],"software":[85,112],"flexibility.":[86],"specific":[87],"accelerators":[89],"designed":[91],"these":[94,101],"codes.":[95],"But":[96],"parsing":[98],"process":[99,126],"codes":[102],"layer":[108],"controlled":[110],"instead":[113],"Finite":[116],"state":[117],"machine":[118],"(FSM).":[119],"This":[120],"can":[122],"speed":[123],"up":[124],"Variable-Length":[128],"Decoding":[129],"(VLD)":[130],"while":[131],"it":[132],"still":[133],"has":[134],"flexibility":[136],"support":[138],"multiple":[139],"coding":[141]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}