{"id":"https://openalex.org/W1992017923","doi":"https://doi.org/10.1109/asicon.2011.6157113","title":"A reconfigurable macro-pipelined DCT/IDCT accelerator","display_name":"A reconfigurable macro-pipelined DCT/IDCT accelerator","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W1992017923","doi":"https://doi.org/10.1109/asicon.2011.6157113","mag":"1992017923"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157113","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157113","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060257529","display_name":"Wenqi Bao","orcid":null},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Wenqi Bao","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, 200240, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, 200240, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100722509","display_name":"Jiang Jiang","orcid":"https://orcid.org/0009-0004-7626-0017"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiang Jiang","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, 200240, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, 200240, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101420990","display_name":"Qing Sun","orcid":"https://orcid.org/0009-0005-9647-882X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qing Sun","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, 200240, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, 200240, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101704886","display_name":"Yuzhuo Fu","orcid":"https://orcid.org/0000-0001-5516-3016"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuzhuo Fu","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, 200240, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, 200240, China","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5060257529"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":0.265,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58972456,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"25","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.991100013256073,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6832318902015686},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.6238695383071899},{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.537093997001648},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37632474303245544},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3725484609603882},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36575838923454285},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3433064818382263},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.3264463245868683},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09410727024078369},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07232674956321716}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6832318902015686},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.6238695383071899},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.537093997001648},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37632474303245544},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3725484609603882},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36575838923454285},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3433064818382263},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.3264463245868683},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09410727024078369},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07232674956321716},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157113","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157113","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6800000071525574,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1994495629","https://openalex.org/W2045715679","https://openalex.org/W2054078980","https://openalex.org/W2061624656","https://openalex.org/W2143757465","https://openalex.org/W2163962121"],"related_works":["https://openalex.org/W2030816003","https://openalex.org/W2055682261","https://openalex.org/W1916685473","https://openalex.org/W1993363272","https://openalex.org/W2186390138","https://openalex.org/W2076325756","https://openalex.org/W2060035984","https://openalex.org/W81423522","https://openalex.org/W2790129917","https://openalex.org/W1509860481"],"abstract_inverted_index":{"In":[0],"this":[1,83],"paper,":[2],"a":[3,69],"reconfigurable":[4],"macro-pipelined":[5],"(RMP)":[6],"accelerator":[7,25,87],"is":[8,45],"proposed":[9],"to":[10,29,39,61,88,91],"speed":[11],"up":[12,90],"the":[13,76,86],"Discrete":[14,20],"Cosine":[15,21],"Transform":[16,22],"(DCT)":[17],"and":[18,67],"Inverse":[19],"(IDCT).":[23],"The":[24,43,79],"can":[26],"be":[27],"reconfigured":[28],"compute":[30],"fixed-point":[31],"or":[32,35],"floating-point,":[33],"one-dimensional":[34],"multi-dimensional":[36],"DCT/IDCT":[37],"according":[38],"different":[40],"system":[41],"requirements.":[42],"prototype":[44],"implemented":[46],"on":[47],"Xilinx":[48],"ML605":[49],"experiment":[50],"board":[51],"with":[52],"64":[53,57],"PEs.":[54],"It":[55],"takes":[56],"cycles":[58],"at":[59],"200MHz":[60],"complete":[62],"an":[63,92],"8\u00d78":[64],"2D":[65],"DCT":[66],"gets":[68],"peak":[70],"performance":[71],"of":[72,82],"25.6":[73],"GFLOPS":[74],"for":[75],"floating-point":[77],"DCT.":[78],"excellent":[80],"scalability":[81],"architecture":[84],"enables":[85],"scale":[89],"extremely":[93],"high":[94],"performance.":[95]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}