{"id":"https://openalex.org/W2740087560","doi":"https://doi.org/10.1109/asap.2017.7995279","title":"Acceleration of Frequent Itemset Mining on FPGA using SDAccel and Vivado HLS","display_name":"Acceleration of Frequent Itemset Mining on FPGA using SDAccel and Vivado HLS","publication_year":2017,"publication_date":"2017-07-01","ids":{"openalex":"https://openalex.org/W2740087560","doi":"https://doi.org/10.1109/asap.2017.7995279","mag":"2740087560"},"language":"en","primary_location":{"id":"doi:10.1109/asap.2017.7995279","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2017.7995279","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103071282","display_name":"Vinh Dang","orcid":"https://orcid.org/0000-0002-4958-6159"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vinh Dang","raw_affiliation_strings":["Department of Computer Science, University of Virginia, Charlottesville, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074818897","display_name":"Kevin Skadron","orcid":"https://orcid.org/0000-0002-8091-9302"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin Skadron","raw_affiliation_strings":["Department of Computer Science, University of Virginia, Charlottesville, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I51556381"],"apc_list":null,"apc_paid":null,"fwci":1.2946,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.8305423,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"195","last_page":"200"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10538","display_name":"Data Mining Algorithms and Applications","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10538","display_name":"Data Mining Algorithms and Applications","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9800000190734863,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10519","display_name":"Advanced Proteomics Techniques and Applications","score":0.9745000004768372,"subfield":{"id":"https://openalex.org/subfields/1607","display_name":"Spectroscopy"},"field":{"id":"https://openalex.org/fields/16","display_name":"Chemistry"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8769592046737671},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8244765400886536},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6432754397392273},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.4592973291873932},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4570505917072296},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4172981381416321},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4101705849170685},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39450573921203613},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3796723783016205},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34933480620384216},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.2644640803337097},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24096766114234924}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8769592046737671},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8244765400886536},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6432754397392273},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.4592973291873932},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4570505917072296},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4172981381416321},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4101705849170685},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39450573921203613},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3796723783016205},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34933480620384216},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2644640803337097},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24096766114234924},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asap.2017.7995279","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2017.7995279","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1484413656","https://openalex.org/W1521294226","https://openalex.org/W1988195213","https://openalex.org/W1990253906","https://openalex.org/W2064853889","https://openalex.org/W2099404336","https://openalex.org/W2297100101","https://openalex.org/W2405102949","https://openalex.org/W4252403066","https://openalex.org/W6628750762"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W3012895752","https://openalex.org/W2366961778","https://openalex.org/W1572721274","https://openalex.org/W4243132314","https://openalex.org/W2298526277"],"abstract_inverted_index":{"Frequent":[0],"itemset":[1],"mining":[2],"(FIM)":[3],"is":[4,20],"a":[5,113,118,125,141,145],"widely-used":[6],"data-mining":[7],"technique":[8],"for":[9,33,56],"discovering":[10],"sets":[11],"of":[12,51,80],"frequently-occurring":[13],"items":[14],"in":[15,26],"large":[16],"databases.":[17],"However,":[18],"FIM":[19,82],"highly":[21],"time-consuming":[22],"when":[23],"datasets":[24],"grow":[25],"size.":[27],"FPGAs":[28],"have":[29],"shown":[30],"great":[31],"promise":[32],"accelerating":[34],"computationally-intensive":[35],"algorithms,":[36],"but":[37],"they":[38,139],"are":[39,95,135],"hard":[40],"to":[41,62,102,109,154],"use":[42],"with":[43,97,124,144],"traditional":[44],"HDL-based":[45],"design":[46],"methods.":[47],"The":[48],"recent":[49],"introduction":[50],"Xilinx":[52],"SDAccel":[53,87],"development":[54,68],"environment":[55],"the":[57,131,155],"C/C++/OpenCL":[58],"languages":[59],"allows":[60],"developers":[61],"utilize":[63],"FPGA's":[64],"potential":[65],"without":[66],"long":[67],"periods":[69],"and":[70,88,92,116,150],"extensive":[71],"hardware":[72],"knowledge.":[73],"This":[74],"paper":[75],"presents":[76],"an":[77,81],"optimized":[78],"implementation":[79,106,149],"algorithm":[83],"on":[84,130],"FPGA":[85,134,148],"using":[86],"Vivado":[89],"HLS.":[90],"Performance":[91],"power":[93],"consumption":[94],"measured":[96],"various":[98],"datasets.":[99],"When":[100],"compared":[101,123,153],"state-of-the-art":[103,146],"solutions,":[104],"this":[105],"offers":[107],"up":[108],"3.2\u00d7":[110],"speedup":[111],"over":[112],"6-core":[114],"CPU,":[115],"has":[117],"better":[119,151],"energy":[120],"efficiency":[121],"as":[122],"GPU.":[126,156],"Our":[127],"preliminary":[128],"results":[129],"new":[132],"XCKU115":[133],"even":[136],"more":[137],"promising:":[138],"demonstrate":[140],"comparable":[142],"performance":[143,152],"HDL":[147]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}